Lines Matching full:l3
3 * AMD L3 cache_disable_{0,1} sysfs handling
17 * L3 cache descriptors
21 struct amd_l3_cache *l3 = &nb->l3_cache; in amd_calc_l3_indices() local
28 l3->subcaches[0] = sc0 = !(val & BIT(0)); in amd_calc_l3_indices()
29 l3->subcaches[1] = sc1 = !(val & BIT(4)); in amd_calc_l3_indices()
32 l3->subcaches[0] = sc0 += !(val & BIT(1)); in amd_calc_l3_indices()
33 l3->subcaches[1] = sc1 += !(val & BIT(5)); in amd_calc_l3_indices()
36 l3->subcaches[2] = sc2 = !(val & BIT(8)) + !(val & BIT(9)); in amd_calc_l3_indices()
37 l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13)); in amd_calc_l3_indices()
39 l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1; in amd_calc_l3_indices()
43 * check whether a slot used for disabling an L3 index is occupied.
44 * @l3: L3 cache descriptor
105 * We need to WBINVD on a core on the node containing the L3 in amd_l3_disable_index()
117 * disable a L3 cache index by using a disable-slot
119 * @l3: L3 cache descriptor
120 * @cpu: A CPU on the node containing the L3 cache
166 pr_warn("L3 slot %d in use/index already disabled!\n", in store_cache_disable()
291 /* only for L3, and not in virtualized environments */ in amd_init_l3_cache()