16 	INTERCEPT_CR = 0,
26 	/* Byte offset 000h (word 0) */
27 	INTERCEPT_CR0_READ = 0,
157 	u64 avic_backing_page;	/* Offset 0xe0 */
158 	u8 reserved_6[8];	/* Offset 0xe8 */
159 	u64 avic_logical_id;	/* Offset 0xf0 */
160 	u64 avic_physical_id;	/* Offset 0xf8 */
164 	u16 bus_lock_counter;		/* Offset 0x120 */
166 	u64 allowed_sev_features;	/* Offset 0x138 */
167 	u64 guest_sev_features;		/* Offset 0x140 */
170 	 * Offset 0x3e0, 32 bytes reserved
180 #define TLB_CONTROL_DO_NOTHING 0
185 #define V_TPR_MASK 0x0f
200 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
222 #define LBR_CTL_ENABLE_MASK BIT_ULL(0)
225 #define SVM_INTERRUPT_SHADOW_MASK	BIT_ULL(0)
239 #define SVM_NESTED_CTL_NP_ENABLE	BIT(0)
244 #define SVM_TSC_RATIO_RSVD	0xffffff0000000000ULL
245 #define SVM_TSC_RATIO_MIN	0x0000000000000001ULL
246 #define SVM_TSC_RATIO_MAX	0x000000ffffffffffULL
247 #define SVM_TSC_RATIO_DEFAULT	0x0100000000ULL
251 #define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK	(0xFFULL)
262 #define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK	GENMASK_ULL(11, 0)
266 #define AVIC_PHYSICAL_ID_TABLE_SIZE_MASK		(0xFFULL)
268 #define AVIC_DOORBELL_PHYSICAL_ID_MASK			GENMASK_ULL(11, 0)
271 #define AVIC_UNACCEL_ACCESS_OFFSET_MASK		0xFF0
272 #define AVIC_UNACCEL_ACCESS_VECTOR_MASK		0xFFFFFFFF
282 #define AVIC_PHYSICAL_MAX_INDEX_MASK	GENMASK_ULL(8, 0)
285  * For AVIC, the max index allowed for physical APIC ID table is 0xfe (254), as
286  * 0xff is a broadcast to all CPUs, i.e. can't be targeted individually.
288 #define AVIC_MAX_PHYSICAL_ID		0XFEULL
291  * For x2AVIC, the max index allowed for physical APIC ID table is 0x1ff (511).
293 #define X2AVIC_MAX_PHYSICAL_ID		0x1FFUL
298 #define SVM_SEV_FEAT_SNP_ACTIVE				BIT(0)
362 	u64 spec_ctrl;		/* Guest version of SPEC_CTRL at 0x2E0 */
435 	u64 reserved_0x320;	/* rsp already available at 0x01d8 */
565 	BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0xa0);  in __unused_size_checks()
566 	BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0xcc);  in __unused_size_checks()
567 	BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0xd8);  in __unused_size_checks()
568 	BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0x180);  in __unused_size_checks()
569 	BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0x248);  in __unused_size_checks()
570 	BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0x298);  in __unused_size_checks()
572 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0xc8);  in __unused_size_checks()
573 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0xcc);  in __unused_size_checks()
574 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0xd8);  in __unused_size_checks()
575 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x1c0);  in __unused_size_checks()
576 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x248);  in __unused_size_checks()
577 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x298);  in __unused_size_checks()
578 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x300);  in __unused_size_checks()
579 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x320);  in __unused_size_checks()
580 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x380);  in __unused_size_checks()
581 	BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x3f0);  in __unused_size_checks()
583 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x0);  in __unused_size_checks()
584 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0xcc);  in __unused_size_checks()
585 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x148);  in __unused_size_checks()
586 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x168);  in __unused_size_checks()
587 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x180);  in __unused_size_checks()
588 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x1e0);  in __unused_size_checks()
589 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x200);  in __unused_size_checks()
590 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x320);  in __unused_size_checks()
591 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x380);  in __unused_size_checks()
592 	BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x3b0);  in __unused_size_checks()
594 	BUILD_BUG_RESERVED_OFFSET(ghcb, 0xff0);  in __unused_size_checks()
597 #define SVM_CPUID_FUNC 0x8000000a
607 #define SVM_SELECTOR_TYPE_MASK (0xf)
620 #define SVM_EVTINJ_VEC_MASK 0xff
625 #define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
648 #define SVM_EXITINFO_REG_MASK 0x0F
671 		return ghcb_##field##_is_valid(ghcb) ? ghcb->save.field : 0;	\