Lines Matching +full:fault +full:- +full:log +full:- +full:enable

1 /* SPDX-License-Identifier: GPL-2.0 */
21 #define MCG_ELOG_P		BIT_ULL(26)  /* Extended error log supported */
29 #define MCG_STATUS_SEAM_NR	BIT_ULL(12)  /* Machine check inside SEAM non-root mode */
32 #define MCG_EXT_CTL_LMCE_EN	BIT_ULL(0) /* Enable LMCE */
49 /* AMD-specific bits */
58  *  - Deferred error interrupt type is specifiable by bank.
59  *  - MCx_MISC0[BlkPtr] field indicates presence of extended MISC registers,
61  *  - TCC bit is present in MCx_STATUS.
73  * of uncorrected errors - so the F bit is deliberately skipped
79 #define MCACOD_SCRUB	0x00C0	/* 0xC0-0xCF Memory Scrubbing */
95 #define MCI_ADDR_PHYSADDR	GENMASK_ULL(boot_cpu_data.x86_phys_bits - 1, 0)
164  * treat it like a fault taken in user mode.
169  * This structure contains all data related to the MCE log.  Also
197  * struct mce_hw_err - Hardware Error Record.
199  * @vendor:	Vendor-specific error information.
201  * Vendor-specific fields should not be added to struct mce. Instead, vendors
202  * should export their vendor-specific data through their structure in the
253 					     u64 lapic_id) { return -EINVAL; }  in apei_smca_report_x86_error()
291 	MCP_TIMESTAMP	= BIT(0),	/* log time stamp */
292 	MCP_UC		= BIT(1),	/* log uncorrected errors */
293 	MCP_DONTLOG	= BIT(2),	/* only clear, don't log */