Lines Matching full:ir
61 : : RLONG_ADDR(addr), "Ir" (nr) : "memory"); in arch_set_bit()
68 asm volatile(__ASM_SIZE(bts) " %1,%0" : : ADDR, "Ir" (nr) : "memory"); in arch___set_bit()
80 : : RLONG_ADDR(addr), "Ir" (nr) : "memory"); in arch_clear_bit()
94 asm volatile(__ASM_SIZE(btr) " %1,%0" : : ADDR, "Ir" (nr) : "memory"); in arch___clear_bit()
117 asm volatile(__ASM_SIZE(btc) " %1,%0" : : ADDR, "Ir" (nr) : "memory"); in arch___change_bit()
129 : : RLONG_ADDR(addr), "Ir" (nr) : "memory"); in arch_change_bit()
136 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(bts), *addr, c, "Ir", nr); in arch_test_and_set_bit()
152 : ADDR, "Ir" (nr) : "memory"); in arch___test_and_set_bit()
159 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btr), *addr, c, "Ir", nr); in arch_test_and_clear_bit()
177 : ADDR, "Ir" (nr) : "memory"); in arch___test_and_clear_bit()
188 : ADDR, "Ir" (nr) : "memory"); in arch___test_and_change_bit()
196 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btc), *addr, c, "Ir", nr); in arch_test_and_change_bit()
224 : "m" (*(unsigned long *)addr), "Ir" (nr) : "memory"); in variable_test_bit()