Lines Matching +full:compute +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Performance events - AMD Processor Power Reporting Mechanism
17 /* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */
26 * The ratio of compute unit power accumulator sample period to the
31 /* Maximum accumulated power of a compute unit. */
37 * Accumulated power represents the sum of each compute unit's (CU) power
46 struct hw_perf_event *hwc = &event->hw;
50 prev_pwr_acc = hwc->pwr_acc;
51 prev_ptsc = hwc->ptsc;
57 * final value (delta) is micro-Watts. Then add it to the event count.
61 delta -= prev_pwr_acc;
63 delta = new_pwr_acc - prev_pwr_acc;
66 tdelta = new_ptsc - prev_ptsc;
69 local64_add(delta, &event->count);
74 if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED)))
77 event->hw.state = 0;
79 rdmsrq(MSR_F15H_PTSC, event->hw.ptsc);
80 rdmsrq(MSR_F15H_CU_PWR_ACCUMULATOR, event->hw.pwr_acc);
90 struct hw_perf_event *hwc = &event->hw;
93 if (!(hwc->state & PERF_HES_STOPPED))
94 hwc->state |= PERF_HES_STOPPED;
97 if ((mode & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
103 hwc->state |= PERF_HES_UPTODATE;
109 struct hw_perf_event *hwc = &event->hw;
111 hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
126 u64 cfg = event->attr.config & AMD_POWER_EVENT_MASK;
129 if (event->attr.type != pmu_class.type)
130 return -ENOENT;
133 if (event->attr.sample_period)
134 return -EINVAL;
137 return -EINVAL;
168 EVENT_ATTR_STR(power-pkg, power_pkg, "event=0x01");
170 EVENT_ATTR_STR(power-pkg.unit, power_pkg_unit, "mWatts");
172 /* Convert the count from micro-Watts to milli-Watts. */
173 EVENT_ATTR_STR(power-pkg.scale, power_pkg_scale, "1.000000e-3");
187 PMU_FORMAT_ATTR(event, "config:0-7");
208 /* system-wide only */
228 * Find a new CPU on the same compute unit, if was set in cpumask
229 * and still some CPUs on compute unit. Then migrate event and
245 * 1) If any CPU is set at cpu_mask in the same compute unit, do
247 * 2) If no CPU is set at cpu_mask in the same compute unit,
269 return -ENODEV;
272 return -ENODEV;
277 pr_err("Failed to read max compute unit power accumulator MSR\n");
278 return -ENODEV;
286 ret = perf_pmu_register(&pmu_class, "power", -1);