Lines Matching +full:5 +full:v0
112 // Define register aliases V0-V15, or V0-V31 if all 32 SIMD registers
120 _define_Vi 5
150 // V0-V3 hold the data blocks during the main loop, or temporary values
285 // store them in the vector registers TWEAK0-TWEAK3. Clobbers V0-V5.
309 vpsrlq $64 - 1*VL/16, TWEAK0, V0
312 vpclmulqdq $0x01, GF_POLY, V0, V1
315 vpslldq $8, V0, V0
322 vpternlogd $0x96, V0, V1, TWEAK1
326 vpxor V0, TWEAK1, TWEAK1
342 .elseif \i == 5
352 .if \i >= 0 && \i < 20 && \i % 5 == 0
354 .elseif \i >= 0 && \i < 20 && \i % 5 == 1
356 .elseif \i >= 0 && \i < 20 && \i % 5 == 2
358 .elseif \i >= 0 && \i < 20 && \i % 5 == 3
360 .elseif \i >= 0 && \i < 20 && \i % 5 == 4
433 // -2*16(KEY) through 7*16(KEY). For AES-192, increment by 5*16 and use
457 _vbroadcast128 -5*16(KEY), KEY2
469 _vbroadcast128 5*16(KEY), KEY12
510 // Do a single round of AES en/decryption on the blocks in registers V0-V3,
516 _tweak_step (2*(\i-5))
517 _vaes \enc, \last, KEY\i, V0
519 _tweak_step (2*(\i-5) + 1)
524 _tweak_step (2*(\i-5))
525 _vaes \enc, \last, V4, V0
527 _tweak_step (2*(\i-5) + 1)
548 _vaes_1x \enc, 0, 5, \xmm_suffix, \data
592 vmovdqu8 0*VL(SRC), V0
596 vpternlogd $0x96, TWEAK0, KEY0, V0
601 vpxor 0*VL(SRC), KEY0, V0
605 vpxor TWEAK0, V0, V0
621 _vaes_4x \enc, 0, 5
633 _vpxor TWEAK0, V0, V0
639 _vmovdqu V0, 0*VL(DST)
672 _vmovdqu (SRC), V0
673 _aes_crypt \enc, , TWEAK0, V0
674 _vmovdqu V0, (DST)
675 _next_tweakvec TWEAK0, V0, V1, TWEAK0
777 vaesenc -5*16(%rdi), %xmm0, %xmm0
789 vaesenc 5*16(%rdi), %xmm0, %xmm0