Lines Matching +full:5 +full:v0

141 // register aliases V0-V31 that map to the ymm or zmm registers.
144 .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15, \
271 .elseif \i == 5
287 .irp i, 0,1,2,3,4,5,6,7,8,9
333 	// Additional local variables.  V0-V2 and %rax are used as temporaries.
421 	// [H^4, H^4, H^4, H^4] to get [H^(i+7), H^(i+6), H^(i+5), H^(i+4)].
425 	_ghash_mul	H_INC, H_CUR, H_CUR, GFPOLY, V0, V1, V2
466 //	H_POW3*GHASHDATA1 => H^6*blk2 and H^5*blk3
510 .elseif \i == 5
511 	vpternlogd	$0x96, GHASHTMP2, GHASHTMP1, GHASHTMP0	// sum(MI_{6,5,4,3,2,1,0})
514 	vpxord		GHASHTMP1, GHASHTMP0, GHASHTMP0		// MI = sum(MI_{7,6,5,4,3,2,1,0})
535 // Do one non-last round of AES encryption on the counter blocks in V0-V3 using
538 	vaesenc		\round_key, V0, V0
548 	// counter blocks, swap each to big-endian, and store them in V0-V3.
549 	vpshufb		BSWAP_MASK, LE_CTR, V0
559 	vpxord		RNDKEY0, V0, V0
611 	// In the main loop, V0-V3 are used as AES input and output.  Elsewhere
643 	// RNDKEY0, RNDKEYLAST, and RNDKEY_M[9-5] contain cached AES round keys,
732 	// vaesenc to ports 0 and 1 and vpclmulqdq to port 5.
755 	vaesenclast	RNDKEYLAST0, V0, GHASHDATA0
770 .irp i, 9,8,7,6,5
817 	// Finish the AES encryption of the counter blocks in V0-V3, interleaved
819 .irp i, 9,8,7,6,5
832 	vaesenclast	RNDKEYLAST0, V0, GHASHDATA0
851 .irp i, 0,1,2,3,4,5,6,7,8,9
914 	vpshufb		BSWAP_MASK, LE_CTR, V0
916 	vpxord		RNDKEY0, V0, V0
920 	vaesenc		RNDKEY, V0, V0
924 	vaesenclast	RNDKEYLAST, V0, V0
928 	vpxord		V1, V0, V0
929 	vmovdqu8	V0, (DST){%k1}
945 	vmovdqu8	V0, V1{%k1}{z}
947 	vpshufb		BSWAP_MASK, V1, V0
948 	vpxord		GHASH_ACC, V0, V0
949 	_ghash_mul_noreduce	H_POW1, V0, LO, MI, HI, GHASHDATA3, V1, V2, V3
959 	_ghash_reduce	LO, MI, HI, GFPOLY, V0
1065 .irp i, 0,1,2,3,4,5,6,7,8