Lines Matching refs:o0
37 cmp %g2, %o0
65 stxa %o0, [%o4] ASI_DMMU
93 stxa %o0, [%o4] ASI_DMMU
119 cmp %o0, %o1
121 sub %o1, %o0, %o3
126 or %o0, 0x20, %o0 ! Nucleus
127 1: stxa %g0, [%o0 + %o3] ASI_DMMU_DEMAP
128 stxa %g0, [%o0 + %o3] ASI_IMMU_DEMAP
176 stxa %o0, [%o1] ASI_DMMU
193 srlx %o0, PAGE_SHIFT, %o0
195 sllx %o0, PAGE_SHIFT, %o0
198 add %o0, %g1, %o0
201 flush %o0 + %g2
221 sub %o0, %g1, %o0 ! physical address
222 srlx %o0, 11, %o0 ! make D-cache TAG
229 cmp %o3, %o0 ! TAG match?
241 sllx %o0, 11, %o0
260 or %o0, %o1, %o0 /* Preserve nucleus page size fields */
261 stxa %o0, [%o2] ASI_DMMU
281 or %o0, %o3, %o0 /* Preserve nucleus page size fields */
282 stxa %o0, [%o4] ASI_DMMU
307 or %o0, %o3, %o0 /* Preserve nucleus page size fields */
308 stxa %o0, [%o4] ASI_DMMU
328 cmp %o0, %o1
330 sub %o1, %o0, %o3
335 or %o0, 0x20, %o0 ! Nucleus
336 1: stxa %g0, [%o0 + %o3] ASI_DMMU_DEMAP
337 stxa %g0, [%o0 + %o3] ASI_IMMU_DEMAP
364 sub %o0, %g1, %o0
367 stxa %g0, [%o0 + %o4] ASI_DCACHE_INVALIDATE
378 mov %i0, %o0
385 mov %o0, %o2 /* ARG2: mmu context */
386 mov 0, %o0 /* ARG0: CPU lists unimplemented */
391 brnz,pn %o0, 1f
407 mov %o0, %g2
408 mov %o1, %o0 /* ARG0: vaddr + IMMU-bit */
411 srlx %o0, PAGE_SHIFT, %o0
412 sllx %o0, PAGE_SHIFT, %o0
414 brnz,pn %o0, 1f
434 mov %o0, %g3
436 ldx [%g2 + %g1], %o0 /* ARG0: vaddr + IMMU-bit */
439 srlx %o0, PAGE_SHIFT, %o0
440 sllx %o0, PAGE_SHIFT, %o0
442 brnz,pn %o0, 1f
462 cmp %o0, %o1
464 sub %o1, %o0, %g2
467 mov %o0, %g1
470 1: add %g1, %g2, %o0 /* ARG0: virtual address */
474 brnz,pn %o0, 3f
483 4: mov 0, %o0 /* ARG0: CPU lists unimplemented */
489 brnz,pn %o0, 3b
506 stw %g1, [%o0]
507 flush %o0
511 add %o0, 4, %o0
719 mov %o0, %g2
724 mov 3, %o0
728 mov 2, %o0
732 mov 1, %o0
736 mov 0, %o0
740 mov %g2, %o0
849 mov %l4, %o0
857 mov %o0, %g2
862 clr %o0 /* ARG0: CPU lists unimplemented */
869 brnz,pn %o0, 1f
870 mov %o0, %g5
871 mov %g2, %o0
885 mov %o0, %g2
888 mov %g1, %o0 /* ARG0: virtual address */
891 srlx %o0, PAGE_SHIFT, %o0
892 sllx %o0, PAGE_SHIFT, %o0
895 brnz,a,pn %o0, 1f
896 mov %o0, %g5
897 mov %g2, %o0
917 mov %o0, %g2
921 1: add %g1, %g3, %o0 /* ARG0: virtual address */
926 brnz,pn %o0, 1f
927 mov %o0, %g5
931 5: mov %g2, %o0
941 mov 0, %o0 /* ARG0: CPU lists unimplemented */
948 brz,pt %o0, 5b
988 sethi %hi(__flush_tlb_mm), %o0
989 or %o0, %lo(__flush_tlb_mm), %o0
995 sethi %hi(__flush_tlb_page), %o0
996 or %o0, %lo(__flush_tlb_page), %o0
1002 sethi %hi(__flush_tlb_pending), %o0
1003 or %o0, %lo(__flush_tlb_pending), %o0
1009 sethi %hi(__flush_tlb_kernel_range), %o0
1010 or %o0, %lo(__flush_tlb_kernel_range), %o0
1017 sethi %hi(__flush_dcache_page), %o0
1018 or %o0, %lo(__flush_dcache_page), %o0
1026 sethi %hi(xcall_flush_tlb_kernel_range), %o0
1027 or %o0, %lo(xcall_flush_tlb_kernel_range), %o0
1041 sethi %hi(__flush_tlb_mm), %o0
1042 or %o0, %lo(__flush_tlb_mm), %o0
1048 sethi %hi(__flush_tlb_page), %o0
1049 or %o0, %lo(__flush_tlb_page), %o0
1055 sethi %hi(__flush_tlb_pending), %o0
1056 or %o0, %lo(__flush_tlb_pending), %o0
1062 sethi %hi(__flush_tlb_kernel_range), %o0
1063 or %o0, %lo(__flush_tlb_kernel_range), %o0
1070 sethi %hi(__flush_dcache_page), %o0
1071 or %o0, %lo(__flush_dcache_page), %o0
1079 sethi %hi(xcall_flush_tlb_mm), %o0
1080 or %o0, %lo(xcall_flush_tlb_mm), %o0
1086 sethi %hi(xcall_flush_tlb_page), %o0
1087 or %o0, %lo(xcall_flush_tlb_page), %o0
1093 sethi %hi(xcall_flush_tlb_kernel_range), %o0
1094 or %o0, %lo(xcall_flush_tlb_kernel_range), %o0