Lines Matching +full:pci +full:- +full:iommu
1 // SPDX-License-Identifier: GPL-2.0
2 /* pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
9 #include <linux/pci.h>
20 #include <asm/iommu.h>
49 /* IOMMU control register. */
56 #define SCHIZO_IOMMU_TSBSZ_1K 0x0000000000000000UL /* TSB Table 1024 8-byte entries */
57 #define SCHIZO_IOMMU_TSBSZ_2K 0x0000000000010000UL /* TSB Table 2048 8-byte entries */
58 #define SCHIZO_IOMMU_TSBSZ_4K 0x0000000000020000UL /* TSB Table 4096 8-byte entries */
59 #define SCHIZO_IOMMU_TSBSZ_8K 0x0000000000030000UL /* TSB Table 8192 8-byte entries */
60 #define SCHIZO_IOMMU_TSBSZ_16K 0x0000000000040000UL /* TSB Table 16k 8-byte entries */
61 #define SCHIZO_IOMMU_TSBSZ_32K 0x0000000000050000UL /* TSB Table 32k 8-byte entries */
62 #define SCHIZO_IOMMU_TSBSZ_64K 0x0000000000060000UL /* TSB Table 64k 8-byte entries */
63 #define SCHIZO_IOMMU_TSBSZ_128K 0x0000000000070000UL /* TSB Table 128k 8-byte entries */
67 #define SCHIZO_IOMMU_CTRL_ENAB 0x0000000000000001UL /* IOMMU Enable */
73 * ---------------------------------------------------------
75 * ---------------------------------------------------------
77 #define SCHIZO_CONFIG_BASE(PBM) ((PBM)->config_space)
90 bus -= pbm->pci_first_busno; in schizo_pci_config_mkaddr()
108 #define SCHIZO_PCIERR_A_INO 0x32 /* PBM A PCI bus error */
109 #define SCHIZO_PCIERR_B_INO 0x33 /* PBM B PCI bus error */
112 #define SCHIZO_STC_ERR 0xb800UL /* --> 0xba00 */
113 #define SCHIZO_STC_TAG 0xba00UL /* --> 0xba80 */
114 #define SCHIZO_STC_LINE 0xbb00UL /* --> 0xbb80 */
134 struct strbuf *strbuf = &pbm->stc; in __schizo_check_stc_error_pbm()
135 unsigned long regbase = pbm->pbm_regs; in __schizo_check_stc_error_pbm()
149 * of the line tag valid bits before re-enabling in __schizo_check_stc_error_pbm()
155 control = upa_readq(strbuf->strbuf_control); in __schizo_check_stc_error_pbm()
157 strbuf->strbuf_control); in __schizo_check_stc_error_pbm()
173 upa_writeq(control, strbuf->strbuf_control); in __schizo_check_stc_error_pbm()
186 pbm->name, in __schizo_check_stc_error_pbm()
196 pbm->name, in __schizo_check_stc_error_pbm()
203 /* XXX Should spit out per-bank error information... -DaveM */ in __schizo_check_stc_error_pbm()
206 pbm->name, in __schizo_check_stc_error_pbm()
220 /* IOMMU is per-PBM in Schizo, so interrogate both for anonymous
242 struct iommu *iommu = pbm->iommu; in schizo_check_iommu_error_pbm() local
249 spin_lock_irqsave(&iommu->lock, flags); in schizo_check_iommu_error_pbm()
250 control = upa_readq(iommu->iommu_control); in schizo_check_iommu_error_pbm()
257 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
274 printk("%s: IOMMU Error, type[%s]\n", in schizo_check_iommu_error_pbm()
275 pbm->name, type_string); in schizo_check_iommu_error_pbm()
277 /* Put the IOMMU into diagnostic mode and probe in schizo_check_iommu_error_pbm()
288 iommu->iommu_control); in schizo_check_iommu_error_pbm()
290 base = pbm->pbm_regs; in schizo_check_iommu_error_pbm()
304 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
329 printk("%s: IOMMU TAG(%d)[error(%s) ctx(%x) wr(%d) str(%d) " in schizo_check_iommu_error_pbm()
331 pbm->name, i, type_string, in schizo_check_iommu_error_pbm()
337 printk("%s: IOMMU DATA(%d)[valid(%d) cache(%d) ppg(%016lx)]\n", in schizo_check_iommu_error_pbm()
338 pbm->name, i, in schizo_check_iommu_error_pbm()
344 if (pbm->stc.strbuf_enabled) in schizo_check_iommu_error_pbm()
346 spin_unlock_irqrestore(&iommu->lock, flags); in schizo_check_iommu_error_pbm()
353 if (pbm->sibling) in schizo_check_iommu_error()
354 schizo_check_iommu_error_pbm(pbm->sibling, type); in schizo_check_iommu_error()
379 unsigned long afsr_reg = pbm->controller_regs + SCHIZO_UE_AFSR; in schizo_ue_intr()
380 unsigned long afar_reg = pbm->controller_regs + SCHIZO_UE_AFAR; in schizo_ue_intr()
389 * the hardware and we must re-read to get a clean value. in schizo_ue_intr()
394 } while ((afsr & SCHIZO_UEAFSR_ERRPNDG) != 0 && --limit); in schizo_ue_intr()
406 pbm->name, in schizo_ue_intr()
414 pbm->name, in schizo_ue_intr()
419 pbm->name, in schizo_ue_intr()
425 printk("%s: UE AFAR [%016lx]\n", pbm->name, afar); in schizo_ue_intr()
426 printk("%s: UE Secondary errors [", pbm->name); in schizo_ue_intr()
440 /* Interrogate IOMMU for error status. */ in schizo_ue_intr()
467 unsigned long afsr_reg = pbm->controller_regs + SCHIZO_CE_AFSR; in schizo_ce_intr()
468 unsigned long afar_reg = pbm->controller_regs + SCHIZO_CE_AFAR; in schizo_ce_intr()
477 * the hardware and we must re-read to get a clean value. in schizo_ce_intr()
482 } while ((afsr & SCHIZO_UEAFSR_ERRPNDG) != 0 && --limit); in schizo_ce_intr()
494 pbm->name, in schizo_ce_intr()
503 * XXX UDB CE trap handler does... -DaveM in schizo_ce_intr()
506 pbm->name, in schizo_ce_intr()
511 pbm->name, in schizo_ce_intr()
517 printk("%s: CE AFAR [%016lx]\n", pbm->name, afar); in schizo_ce_intr()
518 printk("%s: CE Secondary errors [", pbm->name); in schizo_ce_intr()
591 csr_reg = pbm->pbm_regs + SCHIZO_PCI_CTRL; in schizo_pcierr_intr_other()
607 pbm->name); in schizo_pcierr_intr_other()
609 printk("%s: PCI TRDY# timeout error asserted.\n", in schizo_pcierr_intr_other()
610 pbm->name); in schizo_pcierr_intr_other()
612 printk("%s: PCI excessive retry error asserted.\n", in schizo_pcierr_intr_other()
613 pbm->name); in schizo_pcierr_intr_other()
615 printk("%s: PCI discard timeout error asserted.\n", in schizo_pcierr_intr_other()
616 pbm->name); in schizo_pcierr_intr_other()
618 printk("%s: PCI streaming byte hole error asserted.\n", in schizo_pcierr_intr_other()
619 pbm->name); in schizo_pcierr_intr_other()
621 printk("%s: PCI SERR signal asserted.\n", in schizo_pcierr_intr_other()
622 pbm->name); in schizo_pcierr_intr_other()
625 pbm->pci_ops->read(pbm->pci_bus, 0, PCI_STATUS, 2, &stat); in schizo_pcierr_intr_other()
631 printk("%s: PCI bus error, PCI_STATUS[%04x]\n", in schizo_pcierr_intr_other()
632 pbm->name, stat); in schizo_pcierr_intr_other()
633 pbm->pci_ops->write(pbm->pci_bus, 0, PCI_STATUS, 2, 0xffff); in schizo_pcierr_intr_other()
646 base = pbm->pbm_regs; in schizo_pcierr_intr()
668 printk("%s: PCI Error, primary error type[%s]\n", in schizo_pcierr_intr()
669 pbm->name, in schizo_pcierr_intr()
683 pbm->name, in schizo_pcierr_intr()
692 printk("%s: PCI AFAR [%016lx]\n", in schizo_pcierr_intr()
693 pbm->name, afar); in schizo_pcierr_intr()
694 printk("%s: PCI Secondary errors [", in schizo_pcierr_intr()
695 pbm->name); in schizo_pcierr_intr()
725 /* For the error types shown, scan PBM's PCI bus for devices in schizo_pcierr_intr()
730 * IOMMU translation error of some sort. It is extremely in schizo_pcierr_intr()
732 * a bug in the IOMMU support code or a PCI device driver. in schizo_pcierr_intr()
736 pci_scan_for_target_abort(pbm, pbm->pci_bus); in schizo_pcierr_intr()
739 pci_scan_for_master_abort(pbm, pbm->pci_bus); in schizo_pcierr_intr()
749 pci_scan_for_parity_error(pbm, pbm->pci_bus); in schizo_pcierr_intr()
798 errlog = upa_readq(pbm->controller_regs + SCHIZO_SAFARI_ERRLOG); in schizo_safarierr_intr()
800 pbm->controller_regs + SCHIZO_SAFARI_ERRLOG); in schizo_safarierr_intr()
804 pbm->name, errlog); in schizo_safarierr_intr()
810 pbm->name); in schizo_safarierr_intr()
831 if (pbm->ino_bitmap & (1UL << ino)) in pbm_routes_this_ino()
840 * a single PCI bus unit attached to it. It would seem they are separate
848 * PCI bus units of the same Tomatillo. I still have not really
853 struct platform_device *op = of_find_device_by_node(pbm->op->dev.of_node); in tomatillo_register_error_handlers()
866 err = request_irq(op->archdata.irqs[1], schizo_ue_intr, 0, in tomatillo_register_error_handlers()
870 "err=%d\n", pbm->name, err); in tomatillo_register_error_handlers()
873 err = request_irq(op->archdata.irqs[2], schizo_ce_intr, 0, in tomatillo_register_error_handlers()
877 "err=%d\n", pbm->name, err); in tomatillo_register_error_handlers()
881 err = request_irq(op->archdata.irqs[0], schizo_pcierr_intr, 0, in tomatillo_register_error_handlers()
884 err = request_irq(op->archdata.irqs[0], schizo_pcierr_intr, 0, in tomatillo_register_error_handlers()
889 "err=%d\n", pbm->name, err); in tomatillo_register_error_handlers()
892 err = request_irq(op->archdata.irqs[3], schizo_safarierr_intr, 0, in tomatillo_register_error_handlers()
896 "err=%d\n", pbm->name, err); in tomatillo_register_error_handlers()
902 SCHIZO_ECCCTRL_CE), pbm->controller_regs + SCHIZO_ECC_CTRL); in tomatillo_register_error_handlers()
904 /* Enable PCI Error interrupts and clear error in tomatillo_register_error_handlers()
915 tmp = upa_readq(pbm->pbm_regs + SCHIZO_PCI_CTRL); in tomatillo_register_error_handlers()
918 upa_writeq(tmp, pbm->pbm_regs + SCHIZO_PCI_CTRL); in tomatillo_register_error_handlers()
927 upa_writeq(err_mask, pbm->pbm_regs + SCHIZO_PCI_AFSR); in tomatillo_register_error_handlers()
940 pbm->controller_regs + SCHIZO_SAFARI_ERRCTRL); in tomatillo_register_error_handlers()
943 pbm->controller_regs + SCHIZO_SAFARI_IRQCTRL); in tomatillo_register_error_handlers()
948 struct platform_device *op = of_find_device_by_node(pbm->op->dev.of_node); in schizo_register_error_handlers()
961 err = request_irq(op->archdata.irqs[1], schizo_ue_intr, 0, in schizo_register_error_handlers()
965 "err=%d\n", pbm->name, err); in schizo_register_error_handlers()
968 err = request_irq(op->archdata.irqs[2], schizo_ce_intr, 0, in schizo_register_error_handlers()
972 "err=%d\n", pbm->name, err); in schizo_register_error_handlers()
976 err = request_irq(op->archdata.irqs[0], schizo_pcierr_intr, 0, in schizo_register_error_handlers()
979 err = request_irq(op->archdata.irqs[0], schizo_pcierr_intr, 0, in schizo_register_error_handlers()
984 "err=%d\n", pbm->name, err); in schizo_register_error_handlers()
987 err = request_irq(op->archdata.irqs[3], schizo_safarierr_intr, 0, in schizo_register_error_handlers()
991 "err=%d\n", pbm->name, err); in schizo_register_error_handlers()
997 SCHIZO_ECCCTRL_CE), pbm->controller_regs + SCHIZO_ECC_CTRL); in schizo_register_error_handlers()
1010 /* Enable PCI Error interrupts and clear error in schizo_register_error_handlers()
1013 tmp = upa_readq(pbm->pbm_regs + SCHIZO_PCI_CTRL); in schizo_register_error_handlers()
1016 upa_writeq(tmp, pbm->pbm_regs + SCHIZO_PCI_CTRL); in schizo_register_error_handlers()
1024 pbm->pbm_regs + SCHIZO_PCI_AFSR); in schizo_register_error_handlers()
1041 * XXX Sun is shipping. The behavior on a 2-cpu in schizo_register_error_handlers()
1045 * XXX ignore them for now. -DaveM in schizo_register_error_handlers()
1052 pbm->controller_regs + SCHIZO_SAFARI_ERRCTRL); in schizo_register_error_handlers()
1059 /* Set cache-line size to 64 bytes, this is actually in pbm_config_busmastering()
1062 addr = schizo_pci_config_mkaddr(pbm, pbm->pci_first_busno, in pbm_config_busmastering()
1066 /* Set PBM latency timer to 64 PCI clocks. */ in pbm_config_busmastering()
1067 addr = schizo_pci_config_mkaddr(pbm, pbm->pci_first_busno, in pbm_config_busmastering()
1075 pbm->is_66mhz_capable = in schizo_scan_bus()
1076 (of_find_property(pbm->op->dev.of_node, "66mhz-capable", NULL) in schizo_scan_bus()
1079 pbm->pci_bus = pci_scan_one_pbm(pbm, parent); in schizo_scan_bus()
1081 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) in schizo_scan_bus()
1095 unsigned long base = pbm->pbm_regs; in schizo_pbm_strbuf_init()
1098 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) { in schizo_pbm_strbuf_init()
1104 pbm->stc.strbuf_control = base + SCHIZO_STRBUF_CONTROL; in schizo_pbm_strbuf_init()
1105 pbm->stc.strbuf_pflush = base + SCHIZO_STRBUF_FLUSH; in schizo_pbm_strbuf_init()
1106 pbm->stc.strbuf_fsync = base + SCHIZO_STRBUF_FSYNC; in schizo_pbm_strbuf_init()
1107 pbm->stc.strbuf_ctxflush = base + SCHIZO_STRBUF_CTXFLUSH; in schizo_pbm_strbuf_init()
1108 pbm->stc.strbuf_ctxmatch_base = base + SCHIZO_STRBUF_CTXMATCH; in schizo_pbm_strbuf_init()
1110 pbm->stc.strbuf_flushflag = (volatile unsigned long *) in schizo_pbm_strbuf_init()
1111 ((((unsigned long)&pbm->stc.__flushflag_buf[0]) in schizo_pbm_strbuf_init()
1114 pbm->stc.strbuf_flushflag_pa = (unsigned long) in schizo_pbm_strbuf_init()
1115 __pa(pbm->stc.strbuf_flushflag); in schizo_pbm_strbuf_init()
1118 * streaming buffer and leave the rerun-disable in schizo_pbm_strbuf_init()
1121 control = upa_readq(pbm->stc.strbuf_control); in schizo_pbm_strbuf_init()
1126 upa_writeq(control, pbm->stc.strbuf_control); in schizo_pbm_strbuf_init()
1128 pbm->stc.strbuf_enabled = 1; in schizo_pbm_strbuf_init()
1140 struct iommu *iommu = pbm->iommu; in schizo_pbm_iommu_init() local
1146 vdma = of_get_property(pbm->op->dev.of_node, "virtual-dma", NULL); in schizo_pbm_iommu_init()
1168 printk(KERN_ERR PFX "Strange virtual-dma size.\n"); in schizo_pbm_iommu_init()
1169 return -EINVAL; in schizo_pbm_iommu_init()
1172 /* Register addresses, SCHIZO has iommu ctx flushing. */ in schizo_pbm_iommu_init()
1173 iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL; in schizo_pbm_iommu_init()
1174 iommu->iommu_tsbbase = pbm->pbm_regs + SCHIZO_IOMMU_TSBBASE; in schizo_pbm_iommu_init()
1175 iommu->iommu_flush = pbm->pbm_regs + SCHIZO_IOMMU_FLUSH; in schizo_pbm_iommu_init()
1176 iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL); in schizo_pbm_iommu_init()
1177 iommu->iommu_ctxflush = pbm->pbm_regs + SCHIZO_IOMMU_CTXFLUSH; in schizo_pbm_iommu_init()
1182 iommu->write_complete_reg = pbm->controller_regs + 0x10000UL; in schizo_pbm_iommu_init()
1187 control = upa_readq(iommu->iommu_control); in schizo_pbm_iommu_init()
1189 upa_writeq(control, iommu->iommu_control); in schizo_pbm_iommu_init()
1194 upa_writeq(0, pbm->pbm_regs + tagbase + (i * 8UL)); in schizo_pbm_iommu_init()
1195 upa_writeq(0, pbm->pbm_regs + database + (i * 8UL)); in schizo_pbm_iommu_init()
1198 /* Leave diag mode enabled for full-flushing done in schizo_pbm_iommu_init()
1201 err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask, in schizo_pbm_iommu_init()
1202 pbm->numa_node); in schizo_pbm_iommu_init()
1208 upa_writeq(__pa(iommu->page_table), iommu->iommu_tsbbase); in schizo_pbm_iommu_init()
1210 control = upa_readq(iommu->iommu_control); in schizo_pbm_iommu_init()
1222 upa_writeq(control, iommu->iommu_control); in schizo_pbm_iommu_init()
1265 upa_writeq(5, pbm->pbm_regs + SCHIZO_PCI_IRQ_RETRY); in schizo_pbm_hw_init()
1267 tmp = upa_readq(pbm->pbm_regs + SCHIZO_PCI_CTRL); in schizo_pbm_hw_init()
1269 /* Enable arbiter for all PCI slots. */ in schizo_pbm_hw_init()
1272 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO && in schizo_pbm_hw_init()
1273 pbm->chip_version >= 0x2) in schizo_pbm_hw_init()
1276 if (!of_property_read_bool(pbm->op->dev.of_node, "no-bus-parking")) in schizo_pbm_hw_init()
1281 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO && in schizo_pbm_hw_init()
1282 pbm->chip_version <= 0x1) in schizo_pbm_hw_init()
1287 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) in schizo_pbm_hw_init()
1292 upa_writeq(tmp, pbm->pbm_regs + SCHIZO_PCI_CTRL); in schizo_pbm_hw_init()
1294 tmp = upa_readq(pbm->pbm_regs + SCHIZO_PCI_DIAG); in schizo_pbm_hw_init()
1298 upa_writeq(tmp, pbm->pbm_regs + SCHIZO_PCI_DIAG); in schizo_pbm_hw_init()
1300 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) { in schizo_pbm_hw_init()
1310 upa_writeq(tmp, pbm->pbm_regs + TOMATILLO_PCI_IOC_CSR); in schizo_pbm_hw_init()
1319 struct device_node *dp = op->dev.of_node; in schizo_pbm_init()
1340 * 2) Schizo front-end controller regs (same for both PBMs) in schizo_pbm_init()
1341 * 3) PBM PCI config space in schizo_pbm_init()
1345 * 2) Tomatillo front-end controller regs in schizo_pbm_init()
1346 * 3) PBM PCI config space in schizo_pbm_init()
1351 pbm->next = pci_pbm_root; in schizo_pbm_init()
1354 pbm->numa_node = NUMA_NO_NODE; in schizo_pbm_init()
1356 pbm->pci_ops = &sun4u_pci_ops; in schizo_pbm_init()
1357 pbm->config_space_reg_bits = 8; in schizo_pbm_init()
1359 pbm->index = pci_num_pbms++; in schizo_pbm_init()
1361 pbm->portid = portid; in schizo_pbm_init()
1362 pbm->op = op; in schizo_pbm_init()
1364 pbm->chip_type = chip_type; in schizo_pbm_init()
1365 pbm->chip_version = of_getintprop_default(dp, "version#", 0); in schizo_pbm_init()
1366 pbm->chip_revision = of_getintprop_default(dp, "module-version#", 0); in schizo_pbm_init()
1368 pbm->pbm_regs = regs[0].phys_addr; in schizo_pbm_init()
1369 pbm->controller_regs = regs[1].phys_addr - 0x10000UL; in schizo_pbm_init()
1372 pbm->sync_reg = regs[3].phys_addr + 0x1a18UL; in schizo_pbm_init()
1374 pbm->name = dp->full_name; in schizo_pbm_init()
1376 printk("%s: %s PCI Bus Module ver[%x:%x]\n", in schizo_pbm_init()
1377 pbm->name, chipset_name, in schizo_pbm_init()
1378 pbm->chip_version, pbm->chip_revision); in schizo_pbm_init()
1392 schizo_scan_bus(pbm, &op->dev); in schizo_pbm_init()
1411 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { in schizo_find_sibling()
1412 if (portid_compare(pbm->portid, portid, chip_type)) in schizo_find_sibling()
1420 struct device_node *dp = op->dev.of_node; in __schizo_init()
1422 struct iommu *iommu; in __schizo_init() local
1428 err = -ENOMEM; in __schizo_init()
1435 pbm->sibling = schizo_find_sibling(portid, chip_type); in __schizo_init()
1437 iommu = kzalloc(sizeof(struct iommu), GFP_KERNEL); in __schizo_init()
1438 if (!iommu) { in __schizo_init()
1439 printk(KERN_ERR PFX "Cannot allocate PBM A iommu.\n"); in __schizo_init()
1443 pbm->iommu = iommu; in __schizo_init()
1448 if (pbm->sibling) in __schizo_init()
1449 pbm->sibling->sibling = pbm; in __schizo_init()
1451 dev_set_drvdata(&op->dev, pbm); in __schizo_init()
1456 kfree(pbm->iommu); in __schizo_init()
1467 unsigned long chip_type = (unsigned long)device_get_match_data(&op->dev); in schizo_probe()
1470 return -EINVAL; in schizo_probe()
1481 .name = "pci",
1486 .name = "pci",
1491 .name = "pci",