Lines Matching +full:sub +full:- +full:processor
1 /* SPDX-License-Identifier: GPL-2.0
3 * include/asm-sh/spinlock-llsc.h
12 #include <asm/processor.h>
18 #define arch_spin_is_locked(x) ((x)->lock <= 0)
22 * on the local processor, one does not.
41 : "r" (&lock->lock) in arch_spin_lock()
56 : "r" (&lock->lock) in arch_spin_unlock()
74 : "r" (&lock->lock) in arch_spin_trylock()
82 * Read-write spinlocks, allowing multiple readers but only one writer.
85 * writers. For those circumstances we can "mix" irq-safe locks - any writer
86 * needs to get a irq-safe write-lock, but readers can get non-irqsafe
87 * read-locks.
99 "add #-1, %0 \n\t" in arch_read_lock()
103 : "r" (&rw->lock) in arch_read_lock()
119 : "r" (&rw->lock) in arch_read_unlock()
133 "sub %2, %0 \n\t" in arch_write_lock()
137 : "r" (&rw->lock), "r" (RW_LOCK_BIAS) in arch_write_lock()
147 : "r" (&rw->lock), "r" (RW_LOCK_BIAS) in arch_write_unlock()
162 "add #-1, %0 \n\t" in arch_read_trylock()
168 : "r" (&rw->lock) in arch_read_trylock()
185 "sub %3, %0 \n\t" in arch_write_trylock()
191 : "r" (&rw->lock), "r" (RW_LOCK_BIAS) in arch_write_trylock()
195 return (oldval > (RW_LOCK_BIAS - 1)); in arch_write_trylock()