191 	pci_write_reg(chan, data, SH4A_PCIEPHYDOUTR);  in phy_write_reg()
192 	pci_write_reg(chan, phyaddr, SH4A_PCIEPHYADRR);  in phy_write_reg()
197 	pci_write_reg(chan, 0, SH4A_PCIEPHYDOUTR);  in phy_write_reg()
198 	pci_write_reg(chan, 0, SH4A_PCIEPHYADRR);  in phy_write_reg()
295 	pci_write_reg(chan, 1, SH4A_PCIESRSTR);  in pcie_reset()
296 	pci_write_reg(chan, 0, SH4A_PCIETCTLR);  in pcie_reset()
297 	pci_write_reg(chan, 0, SH4A_PCIESRSTR);  in pcie_reset()
298 	pci_write_reg(chan, 0, SH4A_PCIETXVC0SR);  in pcie_reset()
316 	pci_write_reg(chan, PCI_CLASS_BRIDGE_PCI_NORMAL << 8, SH4A_PCIEIDSETR1);  in pcie_init()
328 	pci_write_reg(chan, data, SH4A_PCIEEXPCAP0);  in pcie_init()
331 	pci_write_reg(chan, PCI_EXP_LNKCAP_DLLLARC, SH4A_PCIEEXPCAP3);  in pcie_init()
337 	pci_write_reg(chan, data, SH4A_PCIEEXPCAP4);  in pcie_init()
343 	pci_write_reg(chan, data, SH4A_PCIEEXPCAP5);  in pcie_init()
349 	pci_write_reg(chan, data, SH4A_PCIETLCTLR);  in pcie_init()
358 	pci_write_reg(chan, data, SH4A_PCIEMACCTLR);  in pcie_init()
377 		pci_write_reg(chan, memstart + SZ_512M, SH4A_PCIELAR1);  in pcie_init()
378 		pci_write_reg(chan, ((memsize - SZ_512M) - SZ_256) | 1,  in pcie_init()
385 		pci_write_reg(chan, 0, SH4A_PCIELAR1);  in pcie_init()
386 		pci_write_reg(chan, 0, SH4A_PCIELAMR1);  in pcie_init()
393 	pci_write_reg(chan, memstart, SH4A_PCIELAR0);  in pcie_init()
394 	pci_write_reg(chan, (memsize - SZ_256) | 1, SH4A_PCIELAMR0);  in pcie_init()
399 	pci_write_reg(chan, data, SH4A_PCIETCTLR);  in pcie_init()
407 	pci_write_reg(chan, data, SH4A_PCIEDLINTENR);  in pcie_init()
412 	pci_write_reg(chan, data, SH4A_PCIEMACCTLR);  in pcie_init()
425 	pci_write_reg(chan, data, SH4A_PCIEPCICONF1);  in pcie_init()
427 	pci_write_reg(chan, 0x80888000, SH4A_PCIETXVC0DCTLR);  in pcie_init()
428 	pci_write_reg(chan, 0x00222000, SH4A_PCIERXVC0DCTLR);  in pcie_init()
455 		pci_write_reg(chan, 0x00000000, SH4A_PCIEPTCTLR(win));  in pcie_init()
463 		pci_write_reg(chan, mask << 18, SH4A_PCIEPAMR(win));  in pcie_init()
465 		pci_write_reg(chan, upper_32_bits(res->start),  in pcie_init()
467 		pci_write_reg(chan, lower_32_bits(res->start),  in pcie_init()
474 		pci_write_reg(chan, mask, SH4A_PCIEPTCTLR(win));  in pcie_init()