Lines Matching refs:U4_32
116 U4_32, /* 4 bit unsigned value starting at 32 */ enumerator
179 [U4_32] = { 4, 32, 0 },
203 [INSTR_RIE_R0IU] = { R_8, I16_16, U4_32, 0, 0, 0 },
204 [INSTR_RIE_R0UU] = { R_8, U16_16, U4_32, 0, 0, 0 },
207 [INSTR_RIE_RRPU] = { R_8, R_12, U4_32, J16_16, 0, 0 },
251 [INSTR_RRS_RRRDU] = { R_8, R_12, U4_32, D_20, B_16 },
271 [INSTR_RXE_RRRDU] = { R_8, D_20, X_12, B_16, U4_32, 0 },
299 [INSTR_VRI_V0IU] = { V_8, I16_16, U4_32, 0, 0, 0 },
301 [INSTR_VRI_V0UU2] = { V_8, U16_16, U4_32, 0, 0, 0 },
302 [INSTR_VRI_V0UUU] = { V_8, U8_16, U8_24, U4_32, 0, 0 },
305 [INSTR_VRI_VVUU] = { V_8, V_12, U16_16, U4_32, 0, 0 },
306 [INSTR_VRI_VVUUU] = { V_8, V_12, U12_16, U4_32, U4_28, 0 },
309 [INSTR_VRI_VVV0UU] = { V_8, V_12, V_16, U8_24, U4_32, 0 },
318 [INSTR_VRR_VV0U] = { V_8, V_12, U4_32, 0, 0, 0 },
319 [INSTR_VRR_VV0U0U] = { V_8, V_12, U4_32, U4_24, 0, 0 },
321 [INSTR_VRR_VV0UU2] = { V_8, V_12, U4_32, U4_28, 0, 0 },
322 [INSTR_VRR_VV0UUU] = { V_8, V_12, U4_32, U4_28, U4_24, 0 },
324 [INSTR_VRR_VVV0U] = { V_8, V_12, V_16, U4_32, 0, 0 },
326 [INSTR_VRR_VVV0U0U] = { V_8, V_12, V_16, U4_32, U4_24, 0 },
327 [INSTR_VRR_VVV0UU] = { V_8, V_12, V_16, U4_32, U4_28, 0 },
328 [INSTR_VRR_VVV0UUU] = { V_8, V_12, V_16, U4_32, U4_28, U4_24 },
334 [INSTR_VRS_RVRDU] = { R_8, V_12, D_20, B_16, U4_32, 0 },
336 [INSTR_VRS_VRRDU] = { V_8, R_12, D_20, B_16, U4_32, 0 },
337 [INSTR_VRS_VVRDU] = { V_8, V_12, D_20, B_16, U4_32, 0 },
338 [INSTR_VRV_VVXRDU] = { V_8, D_20, VX_12, B_16, U4_32, 0 },
339 [INSTR_VRX_VRRDU] = { V_8, D_20, X_12, B_16, U4_32, 0 },