Lines Matching full:at
74 A_8, /* Access reg. starting at position 8 */
75 A_12, /* Access reg. starting at position 12 */
76 A_24, /* Access reg. starting at position 24 */
77 A_28, /* Access reg. starting at position 28 */
78 B_16, /* Base register starting at position 16 */
79 B_32, /* Base register starting at position 32 */
80 C_8, /* Control reg. starting at position 8 */
81 C_12, /* Control reg. starting at position 12 */
82 D20_20, /* 20 bit displacement starting at 20 */
83 D_20, /* Displacement starting at position 20 */
84 D_36, /* Displacement starting at position 36 */
85 F_8, /* FPR starting at position 8 */
86 F_12, /* FPR starting at position 12 */
87 F_16, /* FPR starting at position 16 */
88 F_24, /* FPR starting at position 24 */
89 F_28, /* FPR starting at position 28 */
90 F_32, /* FPR starting at position 32 */
91 I8_8, /* 8 bit signed value starting at 8 */
92 I8_32, /* 8 bit signed value starting at 32 */
93 I16_16, /* 16 bit signed value starting at 16 */
94 I16_32, /* 16 bit signed value starting at 32 */
95 I32_16, /* 32 bit signed value starting at 16 */
96 J12_12, /* 12 bit PC relative offset at 12 */
97 J16_16, /* 16 bit PC relative offset at 16 */
98 J16_32, /* 16 bit PC relative offset at 32 */
99 J24_24, /* 24 bit PC relative offset at 24 */
100 J32_16, /* 32 bit PC relative offset at 16 */
101 L4_8, /* 4 bit length starting at position 8 */
102 L4_12, /* 4 bit length starting at position 12 */
103 L8_8, /* 8 bit length starting at position 8 */
104 R_8, /* GPR starting at position 8 */
105 R_12, /* GPR starting at position 12 */
106 R_16, /* GPR starting at position 16 */
107 R_24, /* GPR starting at position 24 */
108 R_28, /* GPR starting at position 28 */
109 U4_8, /* 4 bit unsigned value starting at 8 */
110 U4_12, /* 4 bit unsigned value starting at 12 */
111 U4_16, /* 4 bit unsigned value starting at 16 */
112 U4_20, /* 4 bit unsigned value starting at 20 */
113 U4_24, /* 4 bit unsigned value starting at 24 */
114 U4_28, /* 4 bit unsigned value starting at 28 */
115 U4_32, /* 4 bit unsigned value starting at 32 */
116 U4_36, /* 4 bit unsigned value starting at 36 */
117 U8_8, /* 8 bit unsigned value starting at 8 */
118 U8_16, /* 8 bit unsigned value starting at 16 */
119 U8_24, /* 8 bit unsigned value starting at 24 */
120 U8_28, /* 8 bit unsigned value starting at 28 */
121 U8_32, /* 8 bit unsigned value starting at 32 */
122 U12_16, /* 12 bit unsigned value starting at 16 */
123 U16_16, /* 16 bit unsigned value starting at 16 */
124 U16_20, /* 16 bit unsigned value starting at 20 */
125 U16_32, /* 16 bit unsigned value starting at 32 */
126 U32_16, /* 32 bit unsigned value starting at 16 */
127 VX_12, /* Vector index register starting at position 12 */
128 V_8, /* Vector reg. starting at position 8 */
129 V_12, /* Vector reg. starting at position 12 */
130 V_16, /* Vector reg. starting at position 16 */
131 V_32, /* Vector reg. starting at position 32 */
132 X_12, /* Index register starting at position 12 */
535 /* Looks good, sequence ends at PSW. */ in show_code()