Lines Matching +full:lower +full:- +full:case
1 // SPDX-License-Identifier: GPL-2.0
9 * the BPF JIT compiler for 32-bit ARM by Shubham Bansal and Mircea Gherzan.
20 * RV32 fp => +----------+
22 * | saved fp | RV32 callee-saved registers
24 * +----------+ <= (fp - 4 * NR_SAVED_REGISTERS)
30 * BPF_REG_FP => +----------+ <= (fp - 4 * NR_SAVED_REGISTERS
31 * | | - 4 * BPF_JIT_SCRATCH_REGS)
35 * RV32 sp => +----------+
39 * +----------+
44 /* Stack layout - these are offsets from top of JIT scratch space. */
59 /* Number of callee-saved registers stored to stack: ra, fp, s1--s7. */
63 #define STACK_OFFSET(k) (-4 - (4 * NR_SAVED_REGISTERS) - (4 * (k)))
72 /* Return value from in-kernel function, and exit value from eBPF. */
74 /* Arguments from eBPF program to in-kernel function. */
81 * Callee-saved registers that in-kernel function will preserve.
88 /* Read-only frame pointer to access BPF stack. */
114 u32 lower = imm & 0xfff; in emit_imm() local
118 emit(rv_addi(rd, rd, lower), ctx); in emit_imm()
120 emit(rv_addi(rd, RV_REG_ZERO, lower), ctx); in emit_imm()
126 /* Emit immediate into lower bits. */ in emit_imm32()
129 /* Sign-extend into upper bits. */ in emit_imm32()
133 emit(rv_addi(hi(rd), RV_REG_ZERO, -1), ctx); in emit_imm32()
145 int stack_adjust = ctx->stack_size; in __build_epilogue()
154 /* Restore callee-saved registers. */ in __build_epilogue()
155 emit(rv_lw(RV_REG_RA, stack_adjust - 4, RV_REG_SP), ctx); in __build_epilogue()
156 emit(rv_lw(RV_REG_FP, stack_adjust - 8, RV_REG_SP), ctx); in __build_epilogue()
157 emit(rv_lw(RV_REG_S1, stack_adjust - 12, RV_REG_SP), ctx); in __build_epilogue()
158 emit(rv_lw(RV_REG_S2, stack_adjust - 16, RV_REG_SP), ctx); in __build_epilogue()
159 emit(rv_lw(RV_REG_S3, stack_adjust - 20, RV_REG_SP), ctx); in __build_epilogue()
160 emit(rv_lw(RV_REG_S4, stack_adjust - 24, RV_REG_SP), ctx); in __build_epilogue()
161 emit(rv_lw(RV_REG_S5, stack_adjust - 28, RV_REG_SP), ctx); in __build_epilogue()
162 emit(rv_lw(RV_REG_S6, stack_adjust - 32, RV_REG_SP), ctx); in __build_epilogue()
163 emit(rv_lw(RV_REG_S7, stack_adjust - 36, RV_REG_SP), ctx); in __build_epilogue()
220 if (!ctx->prog->aux->verifier_zext) in bpf_put_reg32()
222 } else if (!ctx->prog->aux->verifier_zext) { in bpf_put_reg32()
230 s32 upper, lower; in emit_jump_and_link() local
238 lower = rvoff & 0xfff; in emit_jump_and_link()
240 emit(rv_jalr(rd, RV_REG_T1, lower), ctx); in emit_jump_and_link()
250 case BPF_MOV: in emit_alu_i64()
253 case BPF_AND: in emit_alu_i64()
263 case BPF_OR: in emit_alu_i64()
271 emit(rv_ori(hi(rd), RV_REG_ZERO, -1), ctx); in emit_alu_i64()
273 case BPF_XOR: in emit_alu_i64()
281 emit(rv_xori(hi(rd), hi(rd), -1), ctx); in emit_alu_i64()
283 case BPF_LSH: in emit_alu_i64()
285 emit(rv_slli(hi(rd), lo(rd), imm - 32), ctx); in emit_alu_i64()
290 emit(rv_srli(RV_REG_T0, lo(rd), 32 - imm), ctx); in emit_alu_i64()
296 case BPF_RSH: in emit_alu_i64()
298 emit(rv_srli(lo(rd), hi(rd), imm - 32), ctx); in emit_alu_i64()
303 emit(rv_slli(RV_REG_T0, hi(rd), 32 - imm), ctx); in emit_alu_i64()
309 case BPF_ARSH: in emit_alu_i64()
311 emit(rv_srai(lo(rd), hi(rd), imm - 32), ctx); in emit_alu_i64()
316 emit(rv_slli(RV_REG_T0, hi(rd), 32 - imm), ctx); in emit_alu_i64()
334 case BPF_MOV: in emit_alu_i32()
337 case BPF_ADD: in emit_alu_i32()
345 case BPF_SUB: in emit_alu_i32()
346 if (is_12b_int(-imm)) { in emit_alu_i32()
347 emit(rv_addi(lo(rd), lo(rd), -imm), ctx); in emit_alu_i32()
353 case BPF_AND: in emit_alu_i32()
361 case BPF_OR: in emit_alu_i32()
369 case BPF_XOR: in emit_alu_i32()
377 case BPF_LSH: in emit_alu_i32()
385 case BPF_RSH: in emit_alu_i32()
393 case BPF_ARSH: in emit_alu_i32()
415 case BPF_MOV: in emit_alu_r64()
419 case BPF_ADD: in emit_alu_r64()
432 case BPF_SUB: in emit_alu_r64()
438 case BPF_AND: in emit_alu_r64()
442 case BPF_OR: in emit_alu_r64()
446 case BPF_XOR: in emit_alu_r64()
450 case BPF_MUL: in emit_alu_r64()
458 case BPF_LSH: in emit_alu_r64()
459 emit(rv_addi(RV_REG_T0, lo(rs), -32), ctx); in emit_alu_r64()
472 case BPF_RSH: in emit_alu_r64()
473 emit(rv_addi(RV_REG_T0, lo(rs), -32), ctx); in emit_alu_r64()
486 case BPF_ARSH: in emit_alu_r64()
487 emit(rv_addi(RV_REG_T0, lo(rs), -32), ctx); in emit_alu_r64()
500 case BPF_NEG: in emit_alu_r64()
520 case BPF_MOV: in emit_alu_r32()
523 case BPF_ADD: in emit_alu_r32()
526 case BPF_SUB: in emit_alu_r32()
529 case BPF_AND: in emit_alu_r32()
532 case BPF_OR: in emit_alu_r32()
535 case BPF_XOR: in emit_alu_r32()
538 case BPF_MUL: in emit_alu_r32()
541 case BPF_DIV: in emit_alu_r32()
544 case BPF_MOD: in emit_alu_r32()
547 case BPF_LSH: in emit_alu_r32()
550 case BPF_RSH: in emit_alu_r32()
553 case BPF_ARSH: in emit_alu_r32()
556 case BPF_NEG: in emit_alu_r32()
567 int e, s = ctx->ninsns; in emit_branch_r64()
580 * The fallthrough case results in the BPF branch being taken. in emit_branch_r64()
586 case BPF_JEQ: in emit_branch_r64()
590 case BPF_JGT: in emit_branch_r64()
595 case BPF_JLT: in emit_branch_r64()
600 case BPF_JGE: in emit_branch_r64()
605 case BPF_JLE: in emit_branch_r64()
610 case BPF_JNE: in emit_branch_r64()
614 case BPF_JSGT: in emit_branch_r64()
619 case BPF_JSLT: in emit_branch_r64()
624 case BPF_JSGE: in emit_branch_r64()
629 case BPF_JSLE: in emit_branch_r64()
634 case BPF_JSET: in emit_branch_r64()
645 e = ctx->ninsns; in emit_branch_r64()
647 rvoff -= ninsns_rvoff(e - s); in emit_branch_r64()
654 int e, s = ctx->ninsns; in emit_bcc()
660 * BPF_JSET is a special case: it has no inverse so we always in emit_bcc()
677 case BPF_JEQ: in emit_bcc()
680 case BPF_JGT: in emit_bcc()
683 case BPF_JLT: in emit_bcc()
686 case BPF_JGE: in emit_bcc()
689 case BPF_JLE: in emit_bcc()
692 case BPF_JNE: in emit_bcc()
695 case BPF_JSGT: in emit_bcc()
698 case BPF_JSLT: in emit_bcc()
701 case BPF_JSGE: in emit_bcc()
704 case BPF_JSLE: in emit_bcc()
707 case BPF_JSET: in emit_bcc()
714 e = ctx->ninsns; in emit_bcc()
716 rvoff -= ninsns_rvoff(e - s); in emit_bcc()
725 int e, s = ctx->ninsns; in emit_branch_r32()
732 e = ctx->ninsns; in emit_branch_r32()
734 rvoff -= ninsns_rvoff(e - s); in emit_branch_r32()
737 return -1; in emit_branch_r32()
747 u32 lower = addr & 0xfff; in emit_call() local
749 /* R1-R4 already in correct registers---need to push R5 to stack. */ in emit_call()
750 emit(rv_addi(RV_REG_SP, RV_REG_SP, -16), ctx); in emit_call()
763 emit(rv_jalr(RV_REG_RA, RV_REG_T1, lower), ctx); in emit_call()
777 * R1 -> &ctx in emit_bpf_tail_call()
778 * R2 -> &array in emit_bpf_tail_call()
779 * R3 -> index in emit_bpf_tail_call()
781 int tc_ninsn, off, start_insn = ctx->ninsns; in emit_bpf_tail_call()
785 tc_ninsn = insn ? ctx->offset[insn] - ctx->offset[insn - 1] : in emit_bpf_tail_call()
786 ctx->offset[0]; in emit_bpf_tail_call()
788 /* max_entries = array->map.max_entries; */ in emit_bpf_tail_call()
791 return -1; in emit_bpf_tail_call()
798 off = ninsns_rvoff(tc_ninsn - (ctx->ninsns - start_insn)); in emit_bpf_tail_call()
802 * if (--tcc < 0) in emit_bpf_tail_call()
805 emit(rv_addi(RV_REG_TCC, RV_REG_TCC, -1), ctx); in emit_bpf_tail_call()
806 off = ninsns_rvoff(tc_ninsn - (ctx->ninsns - start_insn)); in emit_bpf_tail_call()
810 * prog = array->ptrs[index]; in emit_bpf_tail_call()
817 return -1; in emit_bpf_tail_call()
819 off = ninsns_rvoff(tc_ninsn - (ctx->ninsns - start_insn)); in emit_bpf_tail_call()
824 * goto *(prog->bpf_func + 4); in emit_bpf_tail_call()
828 return -1; in emit_bpf_tail_call()
847 case BPF_B: in emit_load_r64()
849 if (!ctx->prog->aux->verifier_zext) in emit_load_r64()
852 case BPF_H: in emit_load_r64()
854 if (!ctx->prog->aux->verifier_zext) in emit_load_r64()
857 case BPF_W: in emit_load_r64()
859 if (!ctx->prog->aux->verifier_zext) in emit_load_r64()
862 case BPF_DW: in emit_load_r64()
882 return -1; in emit_store_r64()
888 case BPF_B: in emit_store_r64()
891 case BPF_H: in emit_store_r64()
894 case BPF_W: in emit_store_r64()
896 case BPF_MEM: in emit_store_r64()
899 case BPF_ATOMIC: /* Only BPF_ADD supported */ in emit_store_r64()
905 case BPF_DW: in emit_store_r64()
956 bool is64 = BPF_CLASS(insn->code) == BPF_ALU64 || in bpf_jit_emit_insn()
957 BPF_CLASS(insn->code) == BPF_JMP; in bpf_jit_emit_insn()
958 int s, e, rvoff, i = insn - ctx->prog->insnsi; in bpf_jit_emit_insn()
959 u8 code = insn->code; in bpf_jit_emit_insn()
960 s16 off = insn->off; in bpf_jit_emit_insn()
961 s32 imm = insn->imm; in bpf_jit_emit_insn()
963 const s8 *dst = bpf2rv32[insn->dst_reg]; in bpf_jit_emit_insn()
964 const s8 *src = bpf2rv32[insn->src_reg]; in bpf_jit_emit_insn()
969 case BPF_ALU64 | BPF_MOV | BPF_X: in bpf_jit_emit_insn()
971 case BPF_ALU64 | BPF_ADD | BPF_X: in bpf_jit_emit_insn()
972 case BPF_ALU64 | BPF_ADD | BPF_K: in bpf_jit_emit_insn()
974 case BPF_ALU64 | BPF_SUB | BPF_X: in bpf_jit_emit_insn()
975 case BPF_ALU64 | BPF_SUB | BPF_K: in bpf_jit_emit_insn()
977 case BPF_ALU64 | BPF_AND | BPF_X: in bpf_jit_emit_insn()
978 case BPF_ALU64 | BPF_OR | BPF_X: in bpf_jit_emit_insn()
979 case BPF_ALU64 | BPF_XOR | BPF_X: in bpf_jit_emit_insn()
981 case BPF_ALU64 | BPF_MUL | BPF_X: in bpf_jit_emit_insn()
982 case BPF_ALU64 | BPF_MUL | BPF_K: in bpf_jit_emit_insn()
984 case BPF_ALU64 | BPF_LSH | BPF_X: in bpf_jit_emit_insn()
985 case BPF_ALU64 | BPF_RSH | BPF_X: in bpf_jit_emit_insn()
986 case BPF_ALU64 | BPF_ARSH | BPF_X: in bpf_jit_emit_insn()
994 case BPF_ALU64 | BPF_NEG: in bpf_jit_emit_insn()
998 case BPF_ALU64 | BPF_DIV | BPF_X: in bpf_jit_emit_insn()
999 case BPF_ALU64 | BPF_DIV | BPF_K: in bpf_jit_emit_insn()
1000 case BPF_ALU64 | BPF_MOD | BPF_X: in bpf_jit_emit_insn()
1001 case BPF_ALU64 | BPF_MOD | BPF_K: in bpf_jit_emit_insn()
1004 case BPF_ALU64 | BPF_MOV | BPF_K: in bpf_jit_emit_insn()
1005 case BPF_ALU64 | BPF_AND | BPF_K: in bpf_jit_emit_insn()
1006 case BPF_ALU64 | BPF_OR | BPF_K: in bpf_jit_emit_insn()
1007 case BPF_ALU64 | BPF_XOR | BPF_K: in bpf_jit_emit_insn()
1008 case BPF_ALU64 | BPF_LSH | BPF_K: in bpf_jit_emit_insn()
1009 case BPF_ALU64 | BPF_RSH | BPF_K: in bpf_jit_emit_insn()
1010 case BPF_ALU64 | BPF_ARSH | BPF_K: in bpf_jit_emit_insn()
1014 case BPF_ALU | BPF_MOV | BPF_X: in bpf_jit_emit_insn()
1022 case BPF_ALU | BPF_ADD | BPF_X: in bpf_jit_emit_insn()
1023 case BPF_ALU | BPF_SUB | BPF_X: in bpf_jit_emit_insn()
1024 case BPF_ALU | BPF_AND | BPF_X: in bpf_jit_emit_insn()
1025 case BPF_ALU | BPF_OR | BPF_X: in bpf_jit_emit_insn()
1026 case BPF_ALU | BPF_XOR | BPF_X: in bpf_jit_emit_insn()
1028 case BPF_ALU | BPF_MUL | BPF_X: in bpf_jit_emit_insn()
1029 case BPF_ALU | BPF_MUL | BPF_K: in bpf_jit_emit_insn()
1031 case BPF_ALU | BPF_DIV | BPF_X: in bpf_jit_emit_insn()
1032 case BPF_ALU | BPF_DIV | BPF_K: in bpf_jit_emit_insn()
1034 case BPF_ALU | BPF_MOD | BPF_X: in bpf_jit_emit_insn()
1035 case BPF_ALU | BPF_MOD | BPF_K: in bpf_jit_emit_insn()
1037 case BPF_ALU | BPF_LSH | BPF_X: in bpf_jit_emit_insn()
1038 case BPF_ALU | BPF_RSH | BPF_X: in bpf_jit_emit_insn()
1039 case BPF_ALU | BPF_ARSH | BPF_X: in bpf_jit_emit_insn()
1047 case BPF_ALU | BPF_MOV | BPF_K: in bpf_jit_emit_insn()
1048 case BPF_ALU | BPF_ADD | BPF_K: in bpf_jit_emit_insn()
1049 case BPF_ALU | BPF_SUB | BPF_K: in bpf_jit_emit_insn()
1050 case BPF_ALU | BPF_AND | BPF_K: in bpf_jit_emit_insn()
1051 case BPF_ALU | BPF_OR | BPF_K: in bpf_jit_emit_insn()
1052 case BPF_ALU | BPF_XOR | BPF_K: in bpf_jit_emit_insn()
1053 case BPF_ALU | BPF_LSH | BPF_K: in bpf_jit_emit_insn()
1054 case BPF_ALU | BPF_RSH | BPF_K: in bpf_jit_emit_insn()
1055 case BPF_ALU | BPF_ARSH | BPF_K: in bpf_jit_emit_insn()
1057 * mul,div,mod are handled in the BPF_X case since there are in bpf_jit_emit_insn()
1058 * no RISC-V I-type equivalents. in bpf_jit_emit_insn()
1063 case BPF_ALU | BPF_NEG: in bpf_jit_emit_insn()
1065 * src is ignored---choose tmp2 as a dummy register since it in bpf_jit_emit_insn()
1071 case BPF_ALU | BPF_END | BPF_FROM_LE: in bpf_jit_emit_insn()
1076 case 16: in bpf_jit_emit_insn()
1080 case 32: in bpf_jit_emit_insn()
1081 if (!ctx->prog->aux->verifier_zext) in bpf_jit_emit_insn()
1084 case 64: in bpf_jit_emit_insn()
1088 pr_err("bpf-jit: BPF_END imm %d invalid\n", imm); in bpf_jit_emit_insn()
1089 return -1; in bpf_jit_emit_insn()
1096 case BPF_ALU | BPF_END | BPF_FROM_BE: in bpf_jit_emit_insn()
1101 case 16: in bpf_jit_emit_insn()
1103 if (!ctx->prog->aux->verifier_zext) in bpf_jit_emit_insn()
1106 case 32: in bpf_jit_emit_insn()
1108 if (!ctx->prog->aux->verifier_zext) in bpf_jit_emit_insn()
1111 case 64: in bpf_jit_emit_insn()
1112 /* Swap upper and lower halves. */ in bpf_jit_emit_insn()
1122 pr_err("bpf-jit: BPF_END imm %d invalid\n", imm); in bpf_jit_emit_insn()
1123 return -1; in bpf_jit_emit_insn()
1130 case BPF_JMP | BPF_JA: in bpf_jit_emit_insn()
1135 case BPF_JMP | BPF_CALL: in bpf_jit_emit_insn()
1141 ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass, &addr, in bpf_jit_emit_insn()
1149 case BPF_JMP | BPF_TAIL_CALL: in bpf_jit_emit_insn()
1151 return -1; in bpf_jit_emit_insn()
1154 case BPF_JMP | BPF_JEQ | BPF_X: in bpf_jit_emit_insn()
1155 case BPF_JMP | BPF_JEQ | BPF_K: in bpf_jit_emit_insn()
1156 case BPF_JMP32 | BPF_JEQ | BPF_X: in bpf_jit_emit_insn()
1157 case BPF_JMP32 | BPF_JEQ | BPF_K: in bpf_jit_emit_insn()
1159 case BPF_JMP | BPF_JNE | BPF_X: in bpf_jit_emit_insn()
1160 case BPF_JMP | BPF_JNE | BPF_K: in bpf_jit_emit_insn()
1161 case BPF_JMP32 | BPF_JNE | BPF_X: in bpf_jit_emit_insn()
1162 case BPF_JMP32 | BPF_JNE | BPF_K: in bpf_jit_emit_insn()
1164 case BPF_JMP | BPF_JLE | BPF_X: in bpf_jit_emit_insn()
1165 case BPF_JMP | BPF_JLE | BPF_K: in bpf_jit_emit_insn()
1166 case BPF_JMP32 | BPF_JLE | BPF_X: in bpf_jit_emit_insn()
1167 case BPF_JMP32 | BPF_JLE | BPF_K: in bpf_jit_emit_insn()
1169 case BPF_JMP | BPF_JLT | BPF_X: in bpf_jit_emit_insn()
1170 case BPF_JMP | BPF_JLT | BPF_K: in bpf_jit_emit_insn()
1171 case BPF_JMP32 | BPF_JLT | BPF_X: in bpf_jit_emit_insn()
1172 case BPF_JMP32 | BPF_JLT | BPF_K: in bpf_jit_emit_insn()
1174 case BPF_JMP | BPF_JGE | BPF_X: in bpf_jit_emit_insn()
1175 case BPF_JMP | BPF_JGE | BPF_K: in bpf_jit_emit_insn()
1176 case BPF_JMP32 | BPF_JGE | BPF_X: in bpf_jit_emit_insn()
1177 case BPF_JMP32 | BPF_JGE | BPF_K: in bpf_jit_emit_insn()
1179 case BPF_JMP | BPF_JGT | BPF_X: in bpf_jit_emit_insn()
1180 case BPF_JMP | BPF_JGT | BPF_K: in bpf_jit_emit_insn()
1181 case BPF_JMP32 | BPF_JGT | BPF_X: in bpf_jit_emit_insn()
1182 case BPF_JMP32 | BPF_JGT | BPF_K: in bpf_jit_emit_insn()
1184 case BPF_JMP | BPF_JSLE | BPF_X: in bpf_jit_emit_insn()
1185 case BPF_JMP | BPF_JSLE | BPF_K: in bpf_jit_emit_insn()
1186 case BPF_JMP32 | BPF_JSLE | BPF_X: in bpf_jit_emit_insn()
1187 case BPF_JMP32 | BPF_JSLE | BPF_K: in bpf_jit_emit_insn()
1189 case BPF_JMP | BPF_JSLT | BPF_X: in bpf_jit_emit_insn()
1190 case BPF_JMP | BPF_JSLT | BPF_K: in bpf_jit_emit_insn()
1191 case BPF_JMP32 | BPF_JSLT | BPF_X: in bpf_jit_emit_insn()
1192 case BPF_JMP32 | BPF_JSLT | BPF_K: in bpf_jit_emit_insn()
1194 case BPF_JMP | BPF_JSGE | BPF_X: in bpf_jit_emit_insn()
1195 case BPF_JMP | BPF_JSGE | BPF_K: in bpf_jit_emit_insn()
1196 case BPF_JMP32 | BPF_JSGE | BPF_X: in bpf_jit_emit_insn()
1197 case BPF_JMP32 | BPF_JSGE | BPF_K: in bpf_jit_emit_insn()
1199 case BPF_JMP | BPF_JSGT | BPF_X: in bpf_jit_emit_insn()
1200 case BPF_JMP | BPF_JSGT | BPF_K: in bpf_jit_emit_insn()
1201 case BPF_JMP32 | BPF_JSGT | BPF_X: in bpf_jit_emit_insn()
1202 case BPF_JMP32 | BPF_JSGT | BPF_K: in bpf_jit_emit_insn()
1204 case BPF_JMP | BPF_JSET | BPF_X: in bpf_jit_emit_insn()
1205 case BPF_JMP | BPF_JSET | BPF_K: in bpf_jit_emit_insn()
1206 case BPF_JMP32 | BPF_JSET | BPF_X: in bpf_jit_emit_insn()
1207 case BPF_JMP32 | BPF_JSET | BPF_K: in bpf_jit_emit_insn()
1210 s = ctx->ninsns; in bpf_jit_emit_insn()
1213 e = ctx->ninsns; in bpf_jit_emit_insn()
1214 rvoff -= ninsns_rvoff(e - s); in bpf_jit_emit_insn()
1223 case BPF_JMP | BPF_EXIT: in bpf_jit_emit_insn()
1224 if (i == ctx->prog->len - 1) in bpf_jit_emit_insn()
1231 case BPF_LD | BPF_IMM | BPF_DW: in bpf_jit_emit_insn()
1243 case BPF_LDX | BPF_MEM | BPF_B: in bpf_jit_emit_insn()
1244 case BPF_LDX | BPF_MEM | BPF_H: in bpf_jit_emit_insn()
1245 case BPF_LDX | BPF_MEM | BPF_W: in bpf_jit_emit_insn()
1246 case BPF_LDX | BPF_MEM | BPF_DW: in bpf_jit_emit_insn()
1248 return -1; in bpf_jit_emit_insn()
1252 case BPF_ST | BPF_NOSPEC: in bpf_jit_emit_insn()
1255 case BPF_ST | BPF_MEM | BPF_B: in bpf_jit_emit_insn()
1256 case BPF_ST | BPF_MEM | BPF_H: in bpf_jit_emit_insn()
1257 case BPF_ST | BPF_MEM | BPF_W: in bpf_jit_emit_insn()
1258 case BPF_ST | BPF_MEM | BPF_DW: in bpf_jit_emit_insn()
1260 case BPF_STX | BPF_MEM | BPF_B: in bpf_jit_emit_insn()
1261 case BPF_STX | BPF_MEM | BPF_H: in bpf_jit_emit_insn()
1262 case BPF_STX | BPF_MEM | BPF_W: in bpf_jit_emit_insn()
1263 case BPF_STX | BPF_MEM | BPF_DW: in bpf_jit_emit_insn()
1271 return -1; in bpf_jit_emit_insn()
1274 case BPF_STX | BPF_ATOMIC | BPF_W: in bpf_jit_emit_insn()
1275 if (insn->imm != BPF_ADD) { in bpf_jit_emit_insn()
1277 "bpf-jit: not supported: atomic operation %02x ***\n", in bpf_jit_emit_insn()
1278 insn->imm); in bpf_jit_emit_insn()
1279 return -EFAULT; in bpf_jit_emit_insn()
1284 return -1; in bpf_jit_emit_insn()
1287 /* No hardware support for 8-byte atomics in RV32. */ in bpf_jit_emit_insn()
1288 case BPF_STX | BPF_ATOMIC | BPF_DW: in bpf_jit_emit_insn()
1292 pr_info_once("bpf-jit: not supported: opcode %02x ***\n", code); in bpf_jit_emit_insn()
1293 return -EFAULT; in bpf_jit_emit_insn()
1296 pr_err("bpf-jit: unknown opcode %02x\n", code); in bpf_jit_emit_insn()
1297 return -EINVAL; in bpf_jit_emit_insn()
1309 round_up(ctx->prog->aux->stack_depth, STACK_ALIGN); in bpf_jit_build_prologue()
1311 /* Make space for callee-saved registers. */ in bpf_jit_build_prologue()
1321 * The first instruction sets the tail-call-counter (TCC) register. in bpf_jit_build_prologue()
1326 emit(rv_addi(RV_REG_SP, RV_REG_SP, -stack_adjust), ctx); in bpf_jit_build_prologue()
1328 /* Save callee-save registers. */ in bpf_jit_build_prologue()
1329 emit(rv_sw(RV_REG_SP, stack_adjust - 4, RV_REG_RA), ctx); in bpf_jit_build_prologue()
1330 emit(rv_sw(RV_REG_SP, stack_adjust - 8, RV_REG_FP), ctx); in bpf_jit_build_prologue()
1331 emit(rv_sw(RV_REG_SP, stack_adjust - 12, RV_REG_S1), ctx); in bpf_jit_build_prologue()
1332 emit(rv_sw(RV_REG_SP, stack_adjust - 16, RV_REG_S2), ctx); in bpf_jit_build_prologue()
1333 emit(rv_sw(RV_REG_SP, stack_adjust - 20, RV_REG_S3), ctx); in bpf_jit_build_prologue()
1334 emit(rv_sw(RV_REG_SP, stack_adjust - 24, RV_REG_S4), ctx); in bpf_jit_build_prologue()
1335 emit(rv_sw(RV_REG_SP, stack_adjust - 28, RV_REG_S5), ctx); in bpf_jit_build_prologue()
1336 emit(rv_sw(RV_REG_SP, stack_adjust - 32, RV_REG_S6), ctx); in bpf_jit_build_prologue()
1337 emit(rv_sw(RV_REG_SP, stack_adjust - 36, RV_REG_S7), ctx); in bpf_jit_build_prologue()
1350 ctx->stack_size = stack_adjust; in bpf_jit_build_prologue()