Lines Matching +full:csr +full:- +full:mask
1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/irqchip/riscv-imsic.h>
50 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_flush_interrupts() local
51 unsigned long mask, val; in kvm_riscv_vcpu_aia_flush_interrupts() local
56 if (READ_ONCE(vcpu->arch.irqs_pending_mask[1])) { in kvm_riscv_vcpu_aia_flush_interrupts()
57 mask = xchg_acquire(&vcpu->arch.irqs_pending_mask[1], 0); in kvm_riscv_vcpu_aia_flush_interrupts()
58 val = READ_ONCE(vcpu->arch.irqs_pending[1]) & mask; in kvm_riscv_vcpu_aia_flush_interrupts()
60 csr->hviph &= ~mask; in kvm_riscv_vcpu_aia_flush_interrupts()
61 csr->hviph |= val; in kvm_riscv_vcpu_aia_flush_interrupts()
67 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_sync_interrupts() local
70 csr->vsieh = ncsr_read(CSR_VSIEH); in kvm_riscv_vcpu_aia_sync_interrupts()
74 bool kvm_riscv_vcpu_aia_has_interrupts(struct kvm_vcpu *vcpu, u64 mask) in kvm_riscv_vcpu_aia_has_interrupts() argument
82 if (READ_ONCE(vcpu->arch.irqs_pending[1]) & in kvm_riscv_vcpu_aia_has_interrupts()
83 (vcpu->arch.aia_context.guest_csr.vsieh & upper_32_bits(mask))) in kvm_riscv_vcpu_aia_has_interrupts()
87 seip = vcpu->arch.guest_csr.vsie; in kvm_riscv_vcpu_aia_has_interrupts()
88 seip &= (unsigned long)mask; in kvm_riscv_vcpu_aia_has_interrupts()
91 if (!kvm_riscv_aia_initialized(vcpu->kvm) || !seip) in kvm_riscv_vcpu_aia_has_interrupts()
99 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_aia_update_hvip() local
105 ncsr_write(CSR_HVIPH, vcpu->arch.aia_context.guest_csr.hviph); in kvm_riscv_vcpu_aia_update_hvip()
107 ncsr_write(CSR_HVICTL, aia_hvictl_value(!!(csr->hvip & BIT(IRQ_VS_EXT)))); in kvm_riscv_vcpu_aia_update_hvip()
112 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_load() local
120 nacl_csr_write(nsh, CSR_VSISELECT, csr->vsiselect); in kvm_riscv_vcpu_aia_load()
121 nacl_csr_write(nsh, CSR_HVIPRIO1, csr->hviprio1); in kvm_riscv_vcpu_aia_load()
122 nacl_csr_write(nsh, CSR_HVIPRIO2, csr->hviprio2); in kvm_riscv_vcpu_aia_load()
124 nacl_csr_write(nsh, CSR_VSIEH, csr->vsieh); in kvm_riscv_vcpu_aia_load()
125 nacl_csr_write(nsh, CSR_HVIPH, csr->hviph); in kvm_riscv_vcpu_aia_load()
126 nacl_csr_write(nsh, CSR_HVIPRIO1H, csr->hviprio1h); in kvm_riscv_vcpu_aia_load()
127 nacl_csr_write(nsh, CSR_HVIPRIO2H, csr->hviprio2h); in kvm_riscv_vcpu_aia_load()
130 csr_write(CSR_VSISELECT, csr->vsiselect); in kvm_riscv_vcpu_aia_load()
131 csr_write(CSR_HVIPRIO1, csr->hviprio1); in kvm_riscv_vcpu_aia_load()
132 csr_write(CSR_HVIPRIO2, csr->hviprio2); in kvm_riscv_vcpu_aia_load()
134 csr_write(CSR_VSIEH, csr->vsieh); in kvm_riscv_vcpu_aia_load()
135 csr_write(CSR_HVIPH, csr->hviph); in kvm_riscv_vcpu_aia_load()
136 csr_write(CSR_HVIPRIO1H, csr->hviprio1h); in kvm_riscv_vcpu_aia_load()
137 csr_write(CSR_HVIPRIO2H, csr->hviprio2h); in kvm_riscv_vcpu_aia_load()
141 if (kvm_riscv_aia_initialized(vcpu->kvm)) in kvm_riscv_vcpu_aia_load()
147 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_put() local
153 if (kvm_riscv_aia_initialized(vcpu->kvm)) in kvm_riscv_vcpu_aia_put()
158 csr->vsiselect = nacl_csr_read(nsh, CSR_VSISELECT); in kvm_riscv_vcpu_aia_put()
159 csr->hviprio1 = nacl_csr_read(nsh, CSR_HVIPRIO1); in kvm_riscv_vcpu_aia_put()
160 csr->hviprio2 = nacl_csr_read(nsh, CSR_HVIPRIO2); in kvm_riscv_vcpu_aia_put()
162 csr->vsieh = nacl_csr_read(nsh, CSR_VSIEH); in kvm_riscv_vcpu_aia_put()
163 csr->hviph = nacl_csr_read(nsh, CSR_HVIPH); in kvm_riscv_vcpu_aia_put()
164 csr->hviprio1h = nacl_csr_read(nsh, CSR_HVIPRIO1H); in kvm_riscv_vcpu_aia_put()
165 csr->hviprio2h = nacl_csr_read(nsh, CSR_HVIPRIO2H); in kvm_riscv_vcpu_aia_put()
168 csr->vsiselect = csr_read(CSR_VSISELECT); in kvm_riscv_vcpu_aia_put()
169 csr->hviprio1 = csr_read(CSR_HVIPRIO1); in kvm_riscv_vcpu_aia_put()
170 csr->hviprio2 = csr_read(CSR_HVIPRIO2); in kvm_riscv_vcpu_aia_put()
172 csr->vsieh = csr_read(CSR_VSIEH); in kvm_riscv_vcpu_aia_put()
173 csr->hviph = csr_read(CSR_HVIPH); in kvm_riscv_vcpu_aia_put()
174 csr->hviprio1h = csr_read(CSR_HVIPRIO1H); in kvm_riscv_vcpu_aia_put()
175 csr->hviprio2h = csr_read(CSR_HVIPRIO2H); in kvm_riscv_vcpu_aia_put()
184 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_get_csr() local
187 return -ENOENT; in kvm_riscv_vcpu_aia_get_csr()
191 *out_val = ((unsigned long *)csr)[reg_num]; in kvm_riscv_vcpu_aia_get_csr()
200 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_set_csr() local
203 return -ENOENT; in kvm_riscv_vcpu_aia_set_csr()
206 ((unsigned long *)csr)[reg_num] = val; in kvm_riscv_vcpu_aia_set_csr()
210 WRITE_ONCE(vcpu->arch.irqs_pending_mask[1], 0); in kvm_riscv_vcpu_aia_set_csr()
228 if (!kvm_riscv_aia_initialized(vcpu->kvm)) in kvm_riscv_vcpu_aia_rmw_topei()
236 * External IRQ priority always read-only zero. This means default
241 0, 8, -1, -1, 16, 24, -1, -1, /* 0 - 7 */
242 32, -1, -1, -1, -1, 40, 48, 56, /* 8 - 15 */
243 64, 72, 80, 88, 96, 104, 112, 120, /* 16 - 23 */
244 -1, -1, -1, -1, -1, -1, -1, -1, /* 24 - 31 */
245 -1, -1, -1, -1, -1, -1, -1, -1, /* 32 - 39 */
246 -1, -1, -1, -1, -1, -1, -1, -1, /* 40 - 47 */
247 -1, -1, -1, -1, -1, -1, -1, -1, /* 48 - 55 */
248 -1, -1, -1, -1, -1, -1, -1, -1, /* 56 - 63 */
354 first_irq = (isel - ISELECT_IPRIO0) * 4; in aia_rmw_iprio()
392 kvm_riscv_aia_initialized(vcpu->kvm)) in kvm_riscv_vcpu_aia_rmw_ireg()
403 int ret = -ENOENT; in kvm_riscv_aia_alloc_hgei()
410 return -ENODEV; in kvm_riscv_aia_alloc_hgei()
412 raw_spin_lock_irqsave(&hgctrl->lock, flags); in kvm_riscv_aia_alloc_hgei()
414 if (hgctrl->free_bitmap) { in kvm_riscv_aia_alloc_hgei()
415 ret = __ffs(hgctrl->free_bitmap); in kvm_riscv_aia_alloc_hgei()
416 hgctrl->free_bitmap &= ~BIT(ret); in kvm_riscv_aia_alloc_hgei()
417 hgctrl->owners[ret] = owner; in kvm_riscv_aia_alloc_hgei()
420 raw_spin_unlock_irqrestore(&hgctrl->lock, flags); in kvm_riscv_aia_alloc_hgei()
423 lc = (gc) ? per_cpu_ptr(gc->local, cpu) : NULL; in kvm_riscv_aia_alloc_hgei()
426 *hgei_va = lc->msi_va + (ret * IMSIC_MMIO_PAGE_SZ); in kvm_riscv_aia_alloc_hgei()
428 *hgei_pa = lc->msi_pa + (ret * IMSIC_MMIO_PAGE_SZ); in kvm_riscv_aia_alloc_hgei()
442 raw_spin_lock_irqsave(&hgctrl->lock, flags); in kvm_riscv_aia_free_hgei()
445 if (!(hgctrl->free_bitmap & BIT(hgei))) { in kvm_riscv_aia_free_hgei()
446 hgctrl->free_bitmap |= BIT(hgei); in kvm_riscv_aia_free_hgei()
447 hgctrl->owners[hgei] = NULL; in kvm_riscv_aia_free_hgei()
451 raw_spin_unlock_irqrestore(&hgctrl->lock, flags); in kvm_riscv_aia_free_hgei()
463 raw_spin_lock_irqsave(&hgctrl->lock, flags); in hgei_interrupt()
466 if (hgctrl->owners[i]) in hgei_interrupt()
467 kvm_vcpu_kick(hgctrl->owners[i]); in hgei_interrupt()
470 raw_spin_unlock_irqrestore(&hgctrl->lock, flags); in hgei_interrupt()
482 /* Initialize per-CPU guest external interrupt line management */ in aia_hgei_init()
485 raw_spin_lock_init(&hgctrl->lock); in aia_hgei_init()
487 hgctrl->free_bitmap = in aia_hgei_init()
488 BIT(kvm_riscv_aia_nr_hgei + 1) - 1; in aia_hgei_init()
489 hgctrl->free_bitmap &= ~BIT(0); in aia_hgei_init()
491 hgctrl->free_bitmap = 0; in aia_hgei_init()
503 return -ENOENT; in aia_hgei_init()
506 /* Map per-CPU SGEI interrupt from INTC domain */ in aia_hgei_init()
510 return -ENOMEM; in aia_hgei_init()
513 /* Request per-CPU SGEI interrupt */ in aia_hgei_init()
515 "riscv-kvm", &aia_hgei); in aia_hgei_init()
531 /* Free per-CPU SGEI interrupt */ in aia_hgei_exit()
550 /* Enable per-CPU SGEI interrupt */ in kvm_riscv_aia_enable()
572 /* Disable per-CPU SGEI interrupt */ in kvm_riscv_aia_disable()
578 raw_spin_lock_irqsave(&hgctrl->lock, flags); in kvm_riscv_aia_disable()
581 vcpu = hgctrl->owners[i]; in kvm_riscv_aia_disable()
586 * We release hgctrl->lock before notifying IMSIC in kvm_riscv_aia_disable()
589 raw_spin_unlock_irqrestore(&hgctrl->lock, flags); in kvm_riscv_aia_disable()
603 raw_spin_lock_irqsave(&hgctrl->lock, flags); in kvm_riscv_aia_disable()
606 raw_spin_unlock_irqrestore(&hgctrl->lock, flags); in kvm_riscv_aia_disable()
617 return -ENODEV; in kvm_riscv_aia_init()
620 /* Figure-out number of bits in HGEIE */ in kvm_riscv_aia_init()
621 csr_write(CSR_HGEIE, -1UL); in kvm_riscv_aia_init()
625 kvm_riscv_aia_nr_hgei--; in kvm_riscv_aia_init()
628 * Number of usable HGEI lines should be minimum of per-HART in kvm_riscv_aia_init()
633 BIT(gc->guest_index_bits) - 1); in kvm_riscv_aia_init()
640 kvm_riscv_aia_max_ids = gc->nr_guest_ids + 1; in kvm_riscv_aia_init()