Lines Matching defs:regs

29 static int set_f32_rd(unsigned long insn, struct pt_regs *regs,  in set_f32_rd()
42 static int set_f64_rd(unsigned long insn, struct pt_regs *regs, u64 val) in set_f64_rd()
62 struct pt_regs *regs) in get_f64_rs()
77 struct pt_regs *regs) in get_f64_rs()
93 struct pt_regs *regs) in get_f32_rs()
105 static void set_f32_rd(unsigned long insn, struct pt_regs *regs, in set_f32_rd()
108 static void set_f64_rd(unsigned long insn, struct pt_regs *regs, u64 val) {} in set_f64_rd()
111 struct pt_regs *regs) in get_f64_rs()
117 struct pt_regs *regs) in get_f32_rs()
124 #define GET_F64_RS2(insn, regs) (get_f64_rs(insn, 20, regs)) argument
125 #define GET_F64_RS2C(insn, regs) (get_f64_rs(insn, 2, regs)) argument
126 #define GET_F64_RS2S(insn, regs) (get_f64_rs(RVC_RS2S(insn), 0, regs)) argument
128 #define GET_F32_RS2(insn, regs) (get_f32_rs(insn, 20, regs)) argument
129 #define GET_F32_RS2C(insn, regs) (get_f32_rs(insn, 2, regs)) argument
130 #define GET_F32_RS2S(insn, regs) (get_f32_rs(RVC_RS2S(insn), 0, regs)) argument
132 #define __read_insn(regs, insn, insn_addr, type) \ argument
146 static inline int get_insn(struct pt_regs *regs, ulong epc, ulong *r_insn) in get_insn()
194 static int handle_vector_misaligned_load(struct pt_regs *regs) in handle_vector_misaligned_load()
214 static int handle_vector_misaligned_load(struct pt_regs *regs) in handle_vector_misaligned_load()
220 static int handle_scalar_misaligned_load(struct pt_regs *regs) in handle_scalar_misaligned_load()
333 static int handle_scalar_misaligned_store(struct pt_regs *regs) in handle_scalar_misaligned_store()
427 int handle_misaligned_load(struct pt_regs *regs) in handle_misaligned_load()
446 int handle_misaligned_store(struct pt_regs *regs) in handle_misaligned_store()