Lines Matching defs:insn

99 #define INSN_LEN(insn)			((((insn) & 0x3) < 0x3) ? 2 : 4)  argument
132 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) argument
133 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) argument
134 #define RVC_RS2(insn) RV_X(insn, SH_RS2C, 5) argument
142 #define REG_OFFSET(insn, pos) \ argument
145 #define REG_PTR(insn, pos, regs) \ argument
148 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) argument
149 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) argument
150 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs)) argument
151 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs)) argument
152 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs)) argument
154 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val)) argument
155 #define IMM_I(insn) ((s32)(insn) >> 20) argument
156 #define IMM_S(insn) (((s32)(insn) >> 25 << 5) | \ argument
160 #define GET_PRECISION(insn) (((insn) >> 25) & 3) argument
161 #define GET_RM(insn) (((insn) >> 12) & 7) argument
167 #define FP_GET_RD(insn) (insn >> 7 & 0x1F) argument
171 static int set_f32_rd(unsigned long insn, struct pt_regs *regs, in set_f32_rd()
184 static int set_f64_rd(unsigned long insn, struct pt_regs *regs, u64 val) in set_f64_rd()
203 static u64 get_f64_rs(unsigned long insn, u8 fp_reg_offset, in get_f64_rs()
218 static unsigned long get_f64_rs(unsigned long insn, u8 fp_reg_offset, in get_f64_rs()
234 static unsigned long get_f32_rs(unsigned long insn, u8 fp_reg_offset, in get_f32_rs()
247 static void set_f32_rd(unsigned long insn, struct pt_regs *regs, in set_f32_rd()
250 static void set_f64_rd(unsigned long insn, struct pt_regs *regs, u64 val) {} in set_f64_rd()
252 static unsigned long get_f64_rs(unsigned long insn, u8 fp_reg_offset, in get_f64_rs()
258 static unsigned long get_f32_rs(unsigned long insn, u8 fp_reg_offset, in get_f32_rs()
266 #define GET_F64_RS2(insn, regs) (get_f64_rs(insn, 20, regs)) argument
267 #define GET_F64_RS2C(insn, regs) (get_f64_rs(insn, 2, regs)) argument
268 #define GET_F64_RS2S(insn, regs) (get_f64_rs(RVC_RS2S(insn), 0, regs)) argument
270 #define GET_F32_RS2(insn, regs) (get_f32_rs(insn, 20, regs)) argument
271 #define GET_F32_RS2C(insn, regs) (get_f32_rs(insn, 2, regs)) argument
272 #define GET_F32_RS2S(insn, regs) (get_f32_rs(RVC_RS2S(insn), 0, regs)) argument
274 #define __read_insn(regs, insn, insn_addr, type) \ argument
290 ulong insn = 0; in get_insn() local
339 unsigned long insn; in handle_vector_misaligned_load() local
366 unsigned long insn; in handle_scalar_misaligned_load() local
479 unsigned long insn; in handle_scalar_misaligned_store() local
572 unsigned long insn; in handle_misaligned_load() local