Lines Matching +full:12 +full:- +full:byte
1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #define INSN_R_FUNC3_SHIFT 12
17 #define INSN_I_FUNC3_SHIFT 12
24 #define INSN_S_FUNC3_SHIFT 12
46 #include <asm/gpr-num.h>
49 .4byte ((\opcode << INSN_R_OPCODE_SHIFT) | \
58 .4byte ((\opcode << INSN_I_OPCODE_SHIFT) | \
66 .4byte ((\opcode << INSN_S_OPCODE_SHIFT) | \
96 #include <asm/gpr-num.h>
101 " .4byte ((\\opcode << " __stringify(INSN_R_OPCODE_SHIFT) ") |" \
112 " .4byte ((\\opcode << " __stringify(INSN_I_OPCODE_SHIFT) ") |" \
122 " .4byte ((\\opcode << " __stringify(INSN_S_OPCODE_SHIFT) ") |" \
208 __ASM_STR(.error "hlv.d requires 64-bit support")
216 INSN_R(OPCODE_SYSTEM, FUNC3(0), FUNC7(12), \
220 INSN_R(OPCODE_SYSTEM, FUNC3(0), FUNC7(12), \
259 #define RISCV_PAUSE ".4byte 0x100000f"
260 #define ZAWRS_WRS_NTO ".4byte 0x00d00073"
261 #define ZAWRS_WRS_STO ".4byte 0x01d00073"
262 #define RISCV_NOP4 ".4byte 0x00000013"