Lines Matching +full:0 +full:xc03
13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
14 #define SR_MIE _AC(0x00000008, UL) /* Machine Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
16 #define SR_MPIE _AC(0x00000080, UL) /* Previous Machine IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
18 #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
21 #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */
22 #define SR_FS_OFF _AC(0x00000000, UL)
23 #define SR_FS_INITIAL _AC(0x00002000, UL)
24 #define SR_FS_CLEAN _AC(0x00004000, UL)
25 #define SR_FS_DIRTY _AC(0x00006000, UL)
27 #define SR_VS _AC(0x00000600, UL) /* Vector Status */
28 #define SR_VS_OFF _AC(0x00000000, UL)
29 #define SR_VS_INITIAL _AC(0x00000200, UL)
30 #define SR_VS_CLEAN _AC(0x00000400, UL)
31 #define SR_VS_DIRTY _AC(0x00000600, UL)
33 #define SR_XS _AC(0x00018000, UL) /* Extension Status */
34 #define SR_XS_OFF _AC(0x00000000, UL)
35 #define SR_XS_INITIAL _AC(0x00008000, UL)
36 #define SR_XS_CLEAN _AC(0x00010000, UL)
37 #define SR_XS_DIRTY _AC(0x00018000, UL)
42 #define SR_SD _AC(0x80000000, UL) /* FS/VS/XS dirty */
44 #define SR_SD _AC(0x8000000000000000, UL) /* FS/VS/XS dirty */
48 #define SR_UXL _AC(0x300000000, UL) /* XLEN mask for U-mode */
49 #define SR_UXL_32 _AC(0x100000000, UL) /* XLEN = 32 for U-mode */
50 #define SR_UXL_64 _AC(0x200000000, UL) /* XLEN = 64 for U-mode */
55 #define SATP_PPN _AC(0x003FFFFF, UL)
56 #define SATP_MODE_32 _AC(0x80000000, UL)
60 #define SATP_ASID_MASK _AC(0x1FF, UL)
62 #define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL)
63 #define SATP_MODE_39 _AC(0x8000000000000000, UL)
64 #define SATP_MODE_48 _AC(0x9000000000000000, UL)
65 #define SATP_MODE_57 _AC(0xa000000000000000, UL)
69 #define SATP_ASID_MASK _AC(0xFFFF, UL)
88 #define IRQ_LOCAL_MASK GENMASK((IRQ_LOCAL_MAX - 1), 0)
91 #define EXC_INST_MISALIGNED 0
111 #define PMP_R 0x01
112 #define PMP_W 0x02
113 #define PMP_X 0x04
114 #define PMP_A 0x18
115 #define PMP_A_TOR 0x08
116 #define PMP_A_NA4 0x10
117 #define PMP_A_NAPOT 0x18
118 #define PMP_L 0x80
122 #define HSTATUS_VSXL _AC(0x300000000, UL)
125 #define HSTATUS_VTSR _AC(0x00400000, UL)
126 #define HSTATUS_VTW _AC(0x00200000, UL)
127 #define HSTATUS_VTVM _AC(0x00100000, UL)
128 #define HSTATUS_VGEIN _AC(0x0003f000, UL)
130 #define HSTATUS_HU _AC(0x00000200, UL)
131 #define HSTATUS_SPVP _AC(0x00000100, UL)
132 #define HSTATUS_SPV _AC(0x00000080, UL)
133 #define HSTATUS_GVA _AC(0x00000040, UL)
134 #define HSTATUS_VSBE _AC(0x00000020, UL)
137 #define HGATP_MODE_OFF _AC(0, UL)
146 #define HGATP32_PPN GENMASK(21, 0)
151 #define HGATP64_PPN GENMASK(43, 0)
176 #define TOPI_IID_MASK GENMASK(11, 0)
177 #define TOPI_IPRIO_MASK GENMASK(7, 0)
181 #define TOPEI_ID_MASK GENMASK(10, 0)
182 #define TOPEI_PRIO_MASK GENMASK(10, 0)
184 #define ISELECT_IPRIO0 0x30
185 #define ISELECT_IPRIO15 0x3f
186 #define ISELECT_MASK GENMASK(8, 0)
193 #define HVICTL_IPRIO GENMASK(7, 0)
201 #define ENVCFG_CBIE (_AC(0x3, UL) << ENVCFG_CBIE_SHIFT)
202 #define ENVCFG_CBIE_ILL _AC(0x0, UL)
203 #define ENVCFG_CBIE_FLUSH _AC(0x1, UL)
204 #define ENVCFG_CBIE_INV _AC(0x3, UL)
205 #define ENVCFG_FIOM _AC(0x1, UL)
220 #define CSR_CYCLE 0xc00
221 #define CSR_TIME 0xc01
222 #define CSR_INSTRET 0xc02
223 #define CSR_HPMCOUNTER3 0xc03
224 #define CSR_HPMCOUNTER4 0xc04
225 #define CSR_HPMCOUNTER5 0xc05
226 #define CSR_HPMCOUNTER6 0xc06
227 #define CSR_HPMCOUNTER7 0xc07
228 #define CSR_HPMCOUNTER8 0xc08
229 #define CSR_HPMCOUNTER9 0xc09
230 #define CSR_HPMCOUNTER10 0xc0a
231 #define CSR_HPMCOUNTER11 0xc0b
232 #define CSR_HPMCOUNTER12 0xc0c
233 #define CSR_HPMCOUNTER13 0xc0d
234 #define CSR_HPMCOUNTER14 0xc0e
235 #define CSR_HPMCOUNTER15 0xc0f
236 #define CSR_HPMCOUNTER16 0xc10
237 #define CSR_HPMCOUNTER17 0xc11
238 #define CSR_HPMCOUNTER18 0xc12
239 #define CSR_HPMCOUNTER19 0xc13
240 #define CSR_HPMCOUNTER20 0xc14
241 #define CSR_HPMCOUNTER21 0xc15
242 #define CSR_HPMCOUNTER22 0xc16
243 #define CSR_HPMCOUNTER23 0xc17
244 #define CSR_HPMCOUNTER24 0xc18
245 #define CSR_HPMCOUNTER25 0xc19
246 #define CSR_HPMCOUNTER26 0xc1a
247 #define CSR_HPMCOUNTER27 0xc1b
248 #define CSR_HPMCOUNTER28 0xc1c
249 #define CSR_HPMCOUNTER29 0xc1d
250 #define CSR_HPMCOUNTER30 0xc1e
251 #define CSR_HPMCOUNTER31 0xc1f
252 #define CSR_CYCLEH 0xc80
253 #define CSR_TIMEH 0xc81
254 #define CSR_INSTRETH 0xc82
255 #define CSR_HPMCOUNTER3H 0xc83
256 #define CSR_HPMCOUNTER4H 0xc84
257 #define CSR_HPMCOUNTER5H 0xc85
258 #define CSR_HPMCOUNTER6H 0xc86
259 #define CSR_HPMCOUNTER7H 0xc87
260 #define CSR_HPMCOUNTER8H 0xc88
261 #define CSR_HPMCOUNTER9H 0xc89
262 #define CSR_HPMCOUNTER10H 0xc8a
263 #define CSR_HPMCOUNTER11H 0xc8b
264 #define CSR_HPMCOUNTER12H 0xc8c
265 #define CSR_HPMCOUNTER13H 0xc8d
266 #define CSR_HPMCOUNTER14H 0xc8e
267 #define CSR_HPMCOUNTER15H 0xc8f
268 #define CSR_HPMCOUNTER16H 0xc90
269 #define CSR_HPMCOUNTER17H 0xc91
270 #define CSR_HPMCOUNTER18H 0xc92
271 #define CSR_HPMCOUNTER19H 0xc93
272 #define CSR_HPMCOUNTER20H 0xc94
273 #define CSR_HPMCOUNTER21H 0xc95
274 #define CSR_HPMCOUNTER22H 0xc96
275 #define CSR_HPMCOUNTER23H 0xc97
276 #define CSR_HPMCOUNTER24H 0xc98
277 #define CSR_HPMCOUNTER25H 0xc99
278 #define CSR_HPMCOUNTER26H 0xc9a
279 #define CSR_HPMCOUNTER27H 0xc9b
280 #define CSR_HPMCOUNTER28H 0xc9c
281 #define CSR_HPMCOUNTER29H 0xc9d
282 #define CSR_HPMCOUNTER30H 0xc9e
283 #define CSR_HPMCOUNTER31H 0xc9f
285 #define CSR_SCOUNTOVF 0xda0
287 #define CSR_SSTATUS 0x100
288 #define CSR_SIE 0x104
289 #define CSR_STVEC 0x105
290 #define CSR_SCOUNTEREN 0x106
291 #define CSR_SENVCFG 0x10a
292 #define CSR_SSTATEEN0 0x10c
293 #define CSR_SSCRATCH 0x140
294 #define CSR_SEPC 0x141
295 #define CSR_SCAUSE 0x142
296 #define CSR_STVAL 0x143
297 #define CSR_SIP 0x144
298 #define CSR_SATP 0x180
300 #define CSR_STIMECMP 0x14D
301 #define CSR_STIMECMPH 0x15D
304 #define CSR_SISELECT 0x150
305 #define CSR_SIREG 0x151
308 #define CSR_STOPEI 0x15c
309 #define CSR_STOPI 0xdb0
312 #define CSR_SIEH 0x114
313 #define CSR_SIPH 0x154
315 #define CSR_VSSTATUS 0x200
316 #define CSR_VSIE 0x204
317 #define CSR_VSTVEC 0x205
318 #define CSR_VSSCRATCH 0x240
319 #define CSR_VSEPC 0x241
320 #define CSR_VSCAUSE 0x242
321 #define CSR_VSTVAL 0x243
322 #define CSR_VSIP 0x244
323 #define CSR_VSATP 0x280
324 #define CSR_VSTIMECMP 0x24D
325 #define CSR_VSTIMECMPH 0x25D
327 #define CSR_HSTATUS 0x600
328 #define CSR_HEDELEG 0x602
329 #define CSR_HIDELEG 0x603
330 #define CSR_HIE 0x604
331 #define CSR_HTIMEDELTA 0x605
332 #define CSR_HCOUNTEREN 0x606
333 #define CSR_HGEIE 0x607
334 #define CSR_HENVCFG 0x60a
335 #define CSR_HTIMEDELTAH 0x615
336 #define CSR_HENVCFGH 0x61a
337 #define CSR_HTVAL 0x643
338 #define CSR_HIP 0x644
339 #define CSR_HVIP 0x645
340 #define CSR_HTINST 0x64a
341 #define CSR_HGATP 0x680
342 #define CSR_HGEIP 0xe12
345 #define CSR_HVIEN 0x608
346 #define CSR_HVICTL 0x609
347 #define CSR_HVIPRIO1 0x646
348 #define CSR_HVIPRIO2 0x647
351 #define CSR_VSISELECT 0x250
352 #define CSR_VSIREG 0x251
355 #define CSR_VSTOPEI 0x25c
356 #define CSR_VSTOPI 0xeb0
359 #define CSR_HIDELEGH 0x613
360 #define CSR_HVIENH 0x618
361 #define CSR_HVIPH 0x655
362 #define CSR_HVIPRIO1H 0x656
363 #define CSR_HVIPRIO2H 0x657
364 #define CSR_VSIEH 0x214
365 #define CSR_VSIPH 0x254
368 #define CSR_HSTATEEN0 0x60c
369 #define CSR_HSTATEEN0H 0x61c
371 #define CSR_MSTATUS 0x300
372 #define CSR_MISA 0x301
373 #define CSR_MIDELEG 0x303
374 #define CSR_MIE 0x304
375 #define CSR_MTVEC 0x305
376 #define CSR_MENVCFG 0x30a
377 #define CSR_MENVCFGH 0x31a
378 #define CSR_MSCRATCH 0x340
379 #define CSR_MEPC 0x341
380 #define CSR_MCAUSE 0x342
381 #define CSR_MTVAL 0x343
382 #define CSR_MIP 0x344
383 #define CSR_PMPCFG0 0x3a0
384 #define CSR_PMPADDR0 0x3b0
385 #define CSR_MVENDORID 0xf11
386 #define CSR_MARCHID 0xf12
387 #define CSR_MIMPID 0xf13
388 #define CSR_MHARTID 0xf14
391 #define CSR_MISELECT 0x350
392 #define CSR_MIREG 0x351
395 #define CSR_MTOPEI 0x35c
396 #define CSR_MTOPI 0xfb0
399 #define CSR_MVIEN 0x308
400 #define CSR_MVIP 0x309
403 #define CSR_MIDELEGH 0x313
404 #define CSR_MIEH 0x314
405 #define CSR_MVIENH 0x318
406 #define CSR_MVIPH 0x319
407 #define CSR_MIPH 0x354
409 #define CSR_VSTART 0x8
410 #define CSR_VCSR 0xf
411 #define CSR_VL 0xc20
412 #define CSR_VTYPE 0xc21
413 #define CSR_VLENB 0xc22
416 #define CSR_SEED 0x015
417 #define SEED_OPST_MASK _AC(0xC0000000, UL)
418 #define SEED_OPST_BIST _AC(0x00000000, UL)
419 #define SEED_OPST_WAIT _AC(0x40000000, UL)
420 #define SEED_OPST_ES16 _AC(0x80000000, UL)
421 #define SEED_OPST_DEAD _AC(0xC0000000, UL)
422 #define SEED_ENTROPY_MASK _AC(0xFFFF, UL)
475 # define SIP_LCOFIP (_AC(0x1, UL) << IRQ_PMU_OVF)
480 #define IE_SIE (_AC(0x1, UL) << RV_IRQ_SOFT)
481 #define IE_TIE (_AC(0x1, UL) << RV_IRQ_TIMER)
482 #define IE_EIE (_AC(0x1, UL) << RV_IRQ_EXT)
489 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
498 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
507 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
515 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
524 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \
532 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
541 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \