Lines Matching +full:i2c +full:- +full:sda +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
26 stdout-path = "serial0:115200n8";
32 bootph-pre-ram;
35 gpio-restart {
36 compatible = "gpio-restart";
41 pwmdac_codec: audio-codec {
42 compatible = "linux,spdif-dit";
43 #sound-dai-cells = <0>;
47 compatible = "simple-audio-card";
48 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
49 #address-cells = <1>;
50 #size-cells = <0>;
52 simple-audio-card,dai-link@0 {
55 bitclock-master = <&sndcpu0>;
56 frame-master = <&sndcpu0>;
59 sound-dai = <&pwmdac>;
63 sound-dai = <&pwmdac_codec>;
70 timebase-frequency = <4000000>;
74 clock-frequency = <74250000>;
78 clock-frequency = <125000000>;
82 clock-frequency = <50000000>;
86 clock-frequency = <125000000>;
90 clock-frequency = <50000000>;
94 clock-frequency = <297000000>;
98 clock-frequency = <12288000>;
102 clock-frequency = <192000>;
106 clock-frequency = <12288000>;
110 clock-frequency = <192000>;
114 clock-frequency = <12288000>;
118 clock-frequency = <24000000>;
122 clock-frequency = <32768>;
126 clock-frequency = <49152000>;
130 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
132 assigned-clock-rates = <49500000>, <198000000>;
135 #address-cells = <1>;
136 #size-cells = <0>;
146 remote-endpoint = <&csi2rx_to_camss>;
153 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
154 assigned-clock-rates = <297000000>;
157 #address-cells = <1>;
158 #size-cells = <0>;
170 remote-endpoint = <&camss_from_csi2rx>;
177 phy-handle = <&phy0>;
178 phy-mode = "rgmii-id";
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "snps,dwmac-mdio";
185 phy0: ethernet-phy@0 {
192 clock-frequency = <100000>;
193 i2c-sda-hold-time-ns = <300>;
194 i2c-sda-falling-time-ns = <510>;
195 i2c-scl-falling-time-ns = <510>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&i2c0_pins>;
201 clock-frequency = <100000>;
202 i2c-sda-hold-time-ns = <300>;
203 i2c-sda-falling-time-ns = <510>;
204 i2c-scl-falling-time-ns = <510>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c2_pins>;
211 clock-frequency = <100000>;
212 i2c-sda-hold-time-ns = <300>;
213 i2c-sda-falling-time-ns = <510>;
214 i2c-scl-falling-time-ns = <510>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&i2c5_pins>;
220 compatible = "x-powers,axp15060";
222 interrupt-controller;
223 #interrupt-cells = <1>;
227 regulator-boot-on;
228 regulator-always-on;
229 regulator-min-microvolt = <3300000>;
230 regulator-max-microvolt = <3300000>;
231 regulator-name = "vcc_3v3";
235 regulator-always-on;
236 regulator-min-microvolt = <500000>;
237 regulator-max-microvolt = <1540000>;
238 regulator-name = "vdd_cpu";
242 regulator-boot-on;
243 regulator-always-on;
244 regulator-min-microvolt = <1800000>;
245 regulator-max-microvolt = <3300000>;
246 regulator-name = "emmc_vdd";
254 bootph-pre-ram;
260 clock-frequency = <100000>;
261 i2c-sda-hold-time-ns = <300>;
262 i2c-sda-falling-time-ns = <510>;
263 i2c-scl-falling-time-ns = <510>;
264 pinctrl-names = "default";
265 pinctrl-0 = <&i2c6_pins>;
270 max-frequency = <100000000>;
271 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
272 assigned-clock-rates = <50000000>;
273 bus-width = <8>;
274 bootph-pre-ram;
275 cap-mmc-highspeed;
276 mmc-ddr-1_8v;
277 mmc-hs200-1_8v;
278 cap-mmc-hw-reset;
279 post-power-on-delay-ms = <200>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&mmc0_pins>;
282 vmmc-supply = <&vcc_3v3>;
283 vqmmc-supply = <&emmc_vdd>;
288 max-frequency = <100000000>;
289 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
290 assigned-clock-rates = <50000000>;
291 bus-width = <4>;
292 bootph-pre-ram;
293 no-sdio;
294 no-mmc;
295 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
296 disable-wp;
297 cap-sd-highspeed;
298 post-power-on-delay-ms = <200>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&mmc1_pins>;
305 perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&pcie0_pins>;
312 perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pcie1_pins>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pwmdac_pins>;
324 #address-cells = <1>;
325 #size-cells = <0>;
329 compatible = "jedec,spi-nor";
331 bootph-pre-ram;
332 cdns,read-delay = <2>;
333 spi-max-frequency = <100000000>;
334 cdns,tshsl-ns = <1>;
335 cdns,tsd2d-ns = <1>;
336 cdns,tchsh-ns = <1>;
337 cdns,tslch-ns = <1>;
340 compatible = "fixed-partitions";
341 #address-cells = <1>;
342 #size-cells = <1>;
347 uboot-env@f0000 {
358 pinctrl-names = "default";
359 pinctrl-0 = <&pwm_pins>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&spi0_pins>;
368 assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_ROOT>,
374 assigned-clock-parents = <&pllclk JH7110_PLLCLK_PLL0_OUT>,
378 assigned-clock-rates = <0>, <0>, <0>, <0>, <500000000>, <1500000000>;
382 i2c0_pins: i2c0-0 {
383 i2c-pins {
390 bias-disable; /* external pull-up */
391 input-enable;
392 input-schmitt-enable;
396 i2c2_pins: i2c2-0 {
397 i2c-pins {
404 bias-disable; /* external pull-up */
405 input-enable;
406 input-schmitt-enable;
410 i2c5_pins: i2c5-0 {
411 bootph-pre-ram;
413 i2c-pins {
420 bias-disable; /* external pull-up */
421 bootph-pre-ram;
422 input-enable;
423 input-schmitt-enable;
427 i2c6_pins: i2c6-0 {
428 i2c-pins {
435 bias-disable; /* external pull-up */
436 input-enable;
437 input-schmitt-enable;
441 mmc0_pins: mmc0-0 {
442 rst-pins {
446 bias-pull-up;
447 drive-strength = <12>;
448 input-disable;
449 input-schmitt-disable;
450 slew-rate = <0>;
453 mmc-pins {
464 bias-pull-up;
465 drive-strength = <12>;
466 input-enable;
470 mmc1_pins: mmc1-0 {
471 clk-pins {
475 bias-pull-up;
476 drive-strength = <12>;
477 input-disable;
478 input-schmitt-disable;
479 slew-rate = <0>;
482 mmc-pins {
498 bias-pull-up;
499 drive-strength = <12>;
500 input-enable;
501 input-schmitt-enable;
502 slew-rate = <0>;
506 pcie0_pins: pcie0-0 {
507 clkreq-pins {
511 bias-pull-down;
512 drive-strength = <2>;
513 input-enable;
514 input-schmitt-disable;
515 slew-rate = <0>;
518 wake-pins {
522 bias-pull-up;
523 drive-strength = <2>;
524 input-enable;
525 input-schmitt-disable;
526 slew-rate = <0>;
530 pcie1_pins: pcie1-0 {
531 clkreq-pins {
535 bias-pull-down;
536 drive-strength = <2>;
537 input-enable;
538 input-schmitt-disable;
539 slew-rate = <0>;
542 wake-pins {
546 bias-pull-up;
547 drive-strength = <2>;
548 input-enable;
549 input-schmitt-disable;
550 slew-rate = <0>;
554 pwmdac_pins: pwmdac-0 {
555 pwmdac-pins {
562 bias-disable;
563 drive-strength = <2>;
564 input-disable;
565 input-schmitt-disable;
566 slew-rate = <0>;
570 pwm_pins: pwm-0 {
571 pwm-pins {
578 bias-disable;
579 drive-strength = <12>;
580 input-disable;
581 input-schmitt-disable;
582 slew-rate = <0>;
586 spi0_pins: spi0-0 {
587 mosi-pins {
591 bias-disable;
592 input-disable;
593 input-schmitt-disable;
596 miso-pins {
600 bias-pull-up;
601 input-enable;
602 input-schmitt-enable;
605 sck-pins {
609 bias-disable;
610 input-disable;
611 input-schmitt-disable;
614 ss-pins {
618 bias-disable;
619 input-disable;
620 input-schmitt-disable;
624 uart0_pins: uart0-0 {
625 tx-pins {
629 bias-disable;
630 drive-strength = <12>;
631 input-disable;
632 input-schmitt-disable;
633 slew-rate = <0>;
636 rx-pins {
640 bias-disable; /* external pull-up */
641 drive-strength = <2>;
642 input-enable;
643 input-schmitt-enable;
644 slew-rate = <0>;
650 bootph-pre-ram;
651 pinctrl-names = "default";
652 pinctrl-0 = <&uart0_pins>;
657 cpu-supply = <&vdd_cpu>;
661 cpu-supply = <&vdd_cpu>;
665 cpu-supply = <&vdd_cpu>;
669 cpu-supply = <&vdd_cpu>;