Lines Matching +full:0 +full:x0000c000

29 		#clock-cells = <0>;
35 		#clock-cells = <0>;
41 		#clock-cells = <0>;
53 			reg = <0x70 0x30005000 0x0 0x1000>;
55 			#size-cells = <0>;
66 			reg = <0x70 0x30006000 0x0 0x1000>;
68 			#size-cells = <0>;
79 			reg = <0x70 0x30007000 0x0 0x1000>;
81 			#size-cells = <0>;
92 			reg = <0x70 0x30008000 0x0 0x1000>;
94 			#size-cells = <0>;
105 			reg = <0x70 0x30009000 0x0 0x400>;
107 			#size-cells = <0>;
112 			port0a: gpio-controller@0 {
117 				reg = <0>;
127 			reg = <0x70 0x3000a000 0x0 0x400>;
129 			#size-cells = <0>;
134 			port1a: gpio-controller@0 {
139 				reg = <0>;
149 			reg = <0x70 0x3000b000 0x0 0x400>;
151 			#size-cells = <0>;
156 			port2a: gpio-controller@0 {
161 				reg = <0>;
171 			reg = <0x70 0x3000c000 0x0 0x20>;
180 			reg = <0x70 0x300100c0 0x0 0x40>;
188 			reg = <0x70 0x30010304 0x0 0x4>,
189 			      <0x70 0x30010300 0x0 0x4>;
192 			#msi-cells = <0>;
198 			reg = <0x70 0x30010368 0x0 0x98>;
206 			reg = <0x70 0x30011000 0x0 0x1000>;
211 			reg = <0x70 0x30012000 0x0 0x1000>;
225 			reg = <0x00000070 0x94000000 0x00000000 0x00004000>;
294 			reg = <0x00000070 0xac004000 0x00000000 0x0000c000>;
304 			reg = <0x00000070 0xac014000 0x00000000 0x0000c000>;
314 			reg = <0x00000070 0xac024000 0x00000000 0x0000c000>;
324 			reg = <0x00000070 0xac034000 0x00000000 0x0000c000>;
334 			reg = <0x00000070 0xac044000 0x00000000 0x0000c000>;
344 			reg = <0x00000070 0xac054000 0x00000000 0x0000c000>;
354 			reg = <0x00000070 0xac064000 0x00000000 0x0000c000>;
364 			reg = <0x00000070 0xac074000 0x00000000 0x0000c000>;
374 			reg = <0x00000070 0xac084000 0x00000000 0x0000c000>;
384 			reg = <0x00000070 0xac094000 0x00000000 0x0000c000>;
394 			reg = <0x00000070 0xac0a4000 0x00000000 0x0000c000>;
404 			reg = <0x00000070 0xac0b4000 0x00000000 0x0000c000>;
414 			reg = <0x00000070 0xac0c4000 0x00000000 0x0000c000>;
424 			reg = <0x00000070 0xac0d4000 0x00000000 0x0000c000>;
434 			reg = <0x00000070 0xac0e4000 0x00000000 0x0000c000>;
444 			reg = <0x00000070 0xac0f4000 0x00000000 0x0000c000>;
454 			#address-cells = <0>;
456 			reg = <0x00000070 0x90000000 0x00000000 0x04000000>;
528 			reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
534 			reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
548 			reg = <0x70 0x40004000 0x00 0x1000>;
553 			#size-cells = <0>;
561 			reg = <0x70 0x40005000 0x00 0x1000>;
566 			#size-cells = <0>;
574 			reg = <0x70 0x40026000 0x0 0x4000>;
585 			snps,multicast-filter-bins = <0>;
599 				#size-cells = <0>;
627 				snps,blen = <16 8 4 0 0 0 0>;
635 			reg = <0x70 0x4002a000 0x0 0x1000>;
649 			reg = <0x70 0x4002b000 0x0 0x1000>;