Lines Matching +full:simple +full:- +full:pm +full:- +full:bus
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
21 * Since this is a non-ratified draft specification, the kernel does not
26 #address-cells = <1>;
27 #size-cells = <0>;
28 timebase-frequency = <7800000>;
34 mmu-type = "riscv,none";
35 i-cache-block-size = <64>;
36 i-cache-size = <0x8000>;
37 d-cache-block-size = <64>;
38 d-cache-size = <0x8000>;
39 cpu0_intc: interrupt-controller {
40 #interrupt-cells = <1>;
41 interrupt-controller;
42 compatible = "riscv,cpu-intc";
50 mmu-type = "riscv,none";
51 i-cache-block-size = <64>;
52 i-cache-size = <0x8000>;
53 d-cache-block-size = <64>;
54 d-cache-size = <0x8000>;
55 cpu1_intc: interrupt-controller {
56 #interrupt-cells = <1>;
57 interrupt-controller;
58 compatible = "riscv,cpu-intc";
62 cpu-map {
82 sram_controller: memory-controller {
83 compatible = "canaan,k210-sram";
87 clock-names = "sram0", "sram1", "aisram";
92 compatible = "fixed-clock";
93 #clock-cells = <0>;
94 clock-frequency = <26000000>;
99 #address-cells = <1>;
100 #size-cells = <1>;
101 compatible = "simple-bus";
103 interrupt-parent = <&plic0>;
107 read-only;
111 compatible = "canaan,k210-clint", "sifive,clint0";
113 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
117 plic0: interrupt-controller@c000000 {
118 #interrupt-cells = <1>;
119 #address-cells = <0>;
120 compatible = "canaan,k210-plic", "sifive,plic-1.0.0";
122 interrupt-controller;
123 interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
129 compatible = "canaan,k210-uarths", "sifive,uart0";
136 gpio0: gpio-controller@38001000 {
137 #interrupt-cells = <2>;
138 #gpio-cells = <2>;
139 compatible = "canaan,k210-gpiohs", "sifive,gpio0";
141 interrupt-controller;
147 gpio-controller;
152 dmac0: dma-controller@50000000 {
153 compatible = "snps,axi-dma-1.01a";
156 #dma-cells = <1>;
158 clock-names = "core-clk", "cfgr-clk";
160 dma-channels = <6>;
161 snps,dma-masters = <2>;
163 snps,data-width = <5>;
164 snps,block-size = <0x200000 0x200000 0x200000
166 snps,axi-max-burst-len = <256>;
169 apb0: bus@50200000 {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 compatible = "simple-pm-bus";
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "snps,dw-apb-gpio";
183 clock-names = "bus", "db";
187 gpio1_0: gpio-port@0 {
188 #gpio-cells = <2>;
189 #interrupt-cells = <2>;
190 compatible = "snps,dw-apb-gpio-port";
192 interrupt-controller;
194 gpio-controller;
200 compatible = "snps,dw-apb-uart";
205 clock-names = "baudclk", "apb_pclk";
207 reg-io-width = <4>;
208 reg-shift = <2>;
209 dcd-override;
210 dsr-override;
211 cts-override;
212 ri-override;
217 compatible = "snps,dw-apb-uart";
222 clock-names = "baudclk", "apb_pclk";
224 reg-io-width = <4>;
225 reg-shift = <2>;
226 dcd-override;
227 dsr-override;
228 cts-override;
229 ri-override;
234 compatible = "snps,dw-apb-uart";
239 clock-names = "baudclk", "apb_pclk";
241 reg-io-width = <4>;
242 reg-shift = <2>;
243 dcd-override;
244 dsr-override;
245 cts-override;
246 ri-override;
251 compatible = "canaan,k210-spi";
252 spi-slave;
254 #address-cells = <0>;
255 #size-cells = <0>;
259 clock-names = "ssi_clk", "pclk";
265 compatible = "canaan,k210-i2s", "snps,designware-i2s";
269 clock-names = "i2sclk";
275 compatible = "canaan,k210-i2s", "snps,designware-i2s";
279 clock-names = "i2sclk";
285 compatible = "canaan,k210-i2s", "snps,designware-i2s";
289 clock-names = "i2sclk";
295 compatible = "snps,designware-i2c";
300 clock-names = "ref", "pclk";
306 compatible = "snps,designware-i2c";
311 clock-names = "ref", "pclk";
317 compatible = "snps,designware-i2c";
322 clock-names = "ref", "pclk";
328 compatible = "canaan,k210-fpioa";
332 clock-names = "ref", "pclk";
334 canaan,k210-sysctl-power = <&sysctl 108>;
338 compatible = "snps,dw-apb-timer";
343 clock-names = "timer", "pclk";
348 compatible = "snps,dw-apb-timer";
353 clock-names = "timer", "pclk";
358 compatible = "snps,dw-apb-timer";
363 clock-names = "timer", "pclk";
368 compatible = "snps,dw-apb-timer";
373 clock-names = "timer", "pclk";
378 compatible = "snps,dw-apb-timer";
383 clock-names = "timer", "pclk";
388 compatible = "snps,dw-apb-timer";
393 clock-names = "timer", "pclk";
398 apb1: bus@50400000 {
399 #address-cells = <1>;
400 #size-cells = <1>;
401 compatible = "simple-pm-bus";
406 compatible = "snps,dw-wdt";
411 clock-names = "tclk", "pclk";
416 compatible = "snps,dw-wdt";
421 clock-names = "tclk", "pclk";
426 compatible = "canaan,k210-sysctl",
427 "syscon", "simple-mfd";
430 clock-names = "pclk";
432 sysclk: clock-controller {
433 #clock-cells = <1>;
434 compatible = "canaan,k210-clk";
438 sysrst: reset-controller {
439 compatible = "canaan,k210-rst";
440 #reset-cells = <1>;
443 reboot: syscon-reboot {
444 compatible = "syscon-reboot";
453 apb2: bus@52000000 {
454 #address-cells = <1>;
455 #size-cells = <1>;
456 compatible = "simple-pm-bus";
461 #address-cells = <1>;
462 #size-cells = <0>;
463 compatible = "canaan,k210-spi";
468 clock-names = "ssi_clk", "pclk";
470 reset-names = "spi";
471 num-cs = <4>;
472 reg-io-width = <4>;
477 #address-cells = <1>;
478 #size-cells = <0>;
479 compatible = "canaan,k210-spi";
484 clock-names = "ssi_clk", "pclk";
486 reset-names = "spi";
487 num-cs = <4>;
488 reg-io-width = <4>;
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "snps,dwc-ssi-1.01a";
500 clock-names = "ssi_clk", "pclk";
502 reset-names = "spi";
504 num-cs = <4>;
505 reg-io-width = <4>;