Lines Matching +full:dsi +full:- +full:rx
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
4 #include <dt-bindings/clock/sun6i-rtc.h>
5 #include <dt-bindings/clock/sun8i-de2.h>
6 #include <dt-bindings/clock/sun8i-tcon-top.h>
7 #include <dt-bindings/clock/sun20i-d1-ccu.h>
8 #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/sun8i-de2.h>
11 #include <dt-bindings/reset/sun20i-d1-ccu.h>
12 #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
18 dcxo: dcxo-clk {
19 compatible = "fixed-clock";
20 clock-output-names = "dcxo";
21 #clock-cells = <0>;
24 de: display-engine {
25 compatible = "allwinner,sun20i-d1-display-engine";
31 compatible = "simple-bus";
33 dma-noncoherent;
34 #address-cells = <1>;
35 #size-cells = <1>;
38 compatible = "allwinner,sun20i-d1-pinctrl";
49 clock-names = "apb", "hosc", "losc";
50 gpio-controller;
51 interrupt-controller;
52 #gpio-cells = <3>;
53 #interrupt-cells = <3>;
55 /omit-if-no-ref/
56 can0_pins: can0-pins {
61 /omit-if-no-ref/
62 can1_pins: can1-pins {
67 /omit-if-no-ref/
68 clk_pg11_pin: clk-pg11-pin {
73 /omit-if-no-ref/
74 dsi_4lane_pins: dsi-4lane-pins {
77 drive-strength = <30>;
78 function = "dsi";
81 /omit-if-no-ref/
82 lcd_rgb666_pins: lcd-rgb666-pins {
90 /omit-if-no-ref/
91 mmc0_pins: mmc0-pins {
96 /omit-if-no-ref/
97 mmc1_pins: mmc1-pins {
102 /omit-if-no-ref/
103 mmc2_pins: mmc2-pins {
108 /omit-if-no-ref/
109 rgmii_pe_pins: rgmii-pe-pins {
116 /omit-if-no-ref/
117 rmii_pe_pins: rmii-pe-pins {
123 /omit-if-no-ref/
124 spi0_pins: spi0-pins {
129 /omit-if-no-ref/
130 uart1_pg6_pins: uart1-pg6-pins {
135 /omit-if-no-ref/
136 uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins {
141 /omit-if-no-ref/
142 uart3_pb_pins: uart3-pb-pins {
148 ccu: clock-controller@2001000 {
149 compatible = "allwinner,sun20i-d1-ccu";
154 clock-names = "hosc", "losc", "iosc";
155 #clock-cells = <1>;
156 #reset-cells = <1>;
160 compatible = "allwinner,sun20i-d1-gpadc";
166 #io-channel-cells = <1>;
170 compatible = "allwinner,sun20i-d1-dmic",
171 "allwinner,sun50i-h6-dmic";
176 clock-names = "bus", "mod";
179 dma-names = "rx";
181 #sound-dai-cells = <0>;
185 compatible = "allwinner,sun20i-d1-i2s",
186 "allwinner,sun50i-r329-i2s";
191 clock-names = "apb", "mod";
194 dma-names = "rx", "tx";
196 #sound-dai-cells = <0>;
200 compatible = "allwinner,sun20i-d1-i2s",
201 "allwinner,sun50i-r329-i2s";
206 clock-names = "apb", "mod";
209 dma-names = "rx", "tx";
211 #sound-dai-cells = <0>;
215 compatible = "allwinner,sun20i-d1-timer",
216 "allwinner,sun8i-a23-timer";
224 compatible = "allwinner,sun20i-d1-wdt-reset",
225 "allwinner,sun20i-d1-wdt";
229 clock-names = "hosc", "losc";
234 compatible = "snps,dw-apb-uart";
236 reg-io-width = <4>;
237 reg-shift = <2>;
242 dma-names = "tx", "rx";
247 compatible = "snps,dw-apb-uart";
249 reg-io-width = <4>;
250 reg-shift = <2>;
255 dma-names = "tx", "rx";
260 compatible = "snps,dw-apb-uart";
262 reg-io-width = <4>;
263 reg-shift = <2>;
268 dma-names = "tx", "rx";
273 compatible = "snps,dw-apb-uart";
275 reg-io-width = <4>;
276 reg-shift = <2>;
281 dma-names = "tx", "rx";
286 compatible = "snps,dw-apb-uart";
288 reg-io-width = <4>;
289 reg-shift = <2>;
294 dma-names = "tx", "rx";
299 compatible = "snps,dw-apb-uart";
301 reg-io-width = <4>;
302 reg-shift = <2>;
307 dma-names = "tx", "rx";
312 compatible = "allwinner,sun20i-d1-i2c",
313 "allwinner,sun8i-v536-i2c",
314 "allwinner,sun6i-a31-i2c";
320 dma-names = "rx", "tx";
322 #address-cells = <1>;
323 #size-cells = <0>;
327 compatible = "allwinner,sun20i-d1-i2c",
328 "allwinner,sun8i-v536-i2c",
329 "allwinner,sun6i-a31-i2c";
335 dma-names = "rx", "tx";
337 #address-cells = <1>;
338 #size-cells = <0>;
342 compatible = "allwinner,sun20i-d1-i2c",
343 "allwinner,sun8i-v536-i2c",
344 "allwinner,sun6i-a31-i2c";
350 dma-names = "rx", "tx";
352 #address-cells = <1>;
353 #size-cells = <0>;
357 compatible = "allwinner,sun20i-d1-i2c",
358 "allwinner,sun8i-v536-i2c",
359 "allwinner,sun6i-a31-i2c";
365 dma-names = "rx", "tx";
367 #address-cells = <1>;
368 #size-cells = <0>;
372 compatible = "allwinner,sun20i-d1-can";
377 pinctrl-names = "default";
378 pinctrl-0 = <&can0_pins>;
383 compatible = "allwinner,sun20i-d1-can";
388 pinctrl-names = "default";
389 pinctrl-0 = <&can1_pins>;
394 compatible = "allwinner,sun20i-d1-system-control";
397 #address-cells = <1>;
398 #size-cells = <1>;
401 compatible = "allwinner,sun20i-d1-system-ldos";
412 dma: dma-controller@3002000 {
413 compatible = "allwinner,sun20i-d1-dma";
417 clock-names = "bus", "mbus";
419 dma-channels = <16>;
420 dma-requests = <48>;
421 #dma-cells = <1>;
425 compatible = "allwinner,sun20i-d1-sid";
427 #address-cells = <1>;
428 #size-cells = <1>;
432 compatible = "allwinner,sun20i-d1-crypto";
439 clock-names = "bus", "mod", "ram", "trng";
443 mbus: dram-controller@3102000 {
444 compatible = "allwinner,sun20i-d1-mbus";
447 reg-names = "mbus", "dram";
452 clock-names = "mbus", "dram", "bus";
453 dma-ranges = <0 0x40000000 0x80000000>;
454 #address-cells = <1>;
455 #size-cells = <1>;
456 #interconnect-cells = <1>;
460 compatible = "allwinner,sun20i-d1-mmc";
464 clock-names = "ahb", "mmc";
466 reset-names = "ahb";
467 cap-sd-highspeed;
468 max-frequency = <150000000>;
469 no-mmc;
471 #address-cells = <1>;
472 #size-cells = <0>;
476 compatible = "allwinner,sun20i-d1-mmc";
480 clock-names = "ahb", "mmc";
482 reset-names = "ahb";
483 cap-sd-highspeed;
484 max-frequency = <150000000>;
485 no-mmc;
487 #address-cells = <1>;
488 #size-cells = <0>;
492 compatible = "allwinner,sun20i-d1-emmc",
493 "allwinner,sun50i-a100-emmc";
497 clock-names = "ahb", "mmc";
499 reset-names = "ahb";
500 cap-mmc-highspeed;
501 max-frequency = <150000000>;
502 mmc-ddr-1_8v;
503 mmc-ddr-3_3v;
504 no-sd;
505 no-sdio;
507 #address-cells = <1>;
508 #size-cells = <0>;
512 compatible = "allwinner,sun20i-d1-spi",
513 "allwinner,sun50i-r329-spi";
517 clock-names = "ahb", "mod";
519 dma-names = "rx", "tx";
522 #address-cells = <1>;
523 #size-cells = <0>;
527 compatible = "allwinner,sun20i-d1-spi-dbi",
528 "allwinner,sun50i-r329-spi-dbi",
529 "allwinner,sun50i-r329-spi";
533 clock-names = "ahb", "mod";
535 dma-names = "rx", "tx";
538 #address-cells = <1>;
539 #size-cells = <0>;
543 compatible = "allwinner,sun20i-d1-musb",
544 "allwinner,sun8i-a33-musb";
547 interrupt-names = "mc";
552 phy-names = "usb";
557 compatible = "allwinner,sun20i-d1-usb-phy";
561 reg-names = "phy_ctrl",
566 clock-names = "usb0_phy",
570 reset-names = "usb0_reset",
573 #phy-cells = <1>;
577 compatible = "allwinner,sun20i-d1-ehci",
578 "generic-ehci";
587 phy-names = "usb";
592 compatible = "allwinner,sun20i-d1-ohci",
593 "generic-ohci";
600 phy-names = "usb";
605 compatible = "allwinner,sun20i-d1-ehci",
606 "generic-ehci";
615 phy-names = "usb";
620 compatible = "allwinner,sun20i-d1-ohci",
621 "generic-ohci";
628 phy-names = "usb";
633 compatible = "allwinner,sun20i-d1-emac",
634 "allwinner,sun50i-a64-emac";
637 interrupt-names = "macirq";
639 clock-names = "stmmaceth";
641 reset-names = "stmmaceth";
646 compatible = "snps,dwmac-mdio";
647 #address-cells = <1>;
648 #size-cells = <0>;
652 display_clocks: clock-controller@5000000 {
653 compatible = "allwinner,sun20i-d1-de2-clk",
654 "allwinner,sun50i-h5-de2-clk";
657 clock-names = "bus", "mod";
659 #clock-cells = <1>;
660 #reset-cells = <1>;
664 compatible = "allwinner,sun20i-d1-de2-mixer-0";
668 clock-names = "bus", "mod";
672 #address-cells = <1>;
673 #size-cells = <0>;
679 remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
686 compatible = "allwinner,sun20i-d1-de2-mixer-1";
690 clock-names = "bus", "mod";
694 #address-cells = <1>;
695 #size-cells = <0>;
701 remote-endpoint = <&tcon_top_mixer1_in_mixer1>;
707 dsi: dsi@5450000 { label
708 compatible = "allwinner,sun20i-d1-mipi-dsi",
709 "allwinner,sun50i-a100-mipi-dsi";
714 clock-names = "bus", "mod";
717 phy-names = "dphy";
722 remote-endpoint = <&tcon_lcd0_out_dsi>;
728 compatible = "allwinner,sun20i-d1-mipi-dphy",
729 "allwinner,sun50i-a100-mipi-dphy";
734 clock-names = "bus", "mod";
736 #phy-cells = <0>;
739 tcon_top: tcon-top@5460000 {
740 compatible = "allwinner,sun20i-d1-tcon-top";
746 clock-names = "bus", "tcon-tv0", "tve0", "dsi";
747 clock-output-names = "tcon-top-tv0", "tcon-top-dsi";
749 #clock-cells = <1>;
752 #address-cells = <1>;
753 #size-cells = <0>;
759 remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
765 #address-cells = <1>;
766 #size-cells = <0>;
770 remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>;
775 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
781 #address-cells = <1>;
782 #size-cells = <0>;
786 remote-endpoint = <&mixer1_out_tcon_top_mixer1>;
792 #address-cells = <1>;
793 #size-cells = <0>;
797 remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>;
802 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
810 remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>;
820 tcon_lcd0: lcd-controller@5461000 {
821 compatible = "allwinner,sun20i-d1-tcon-lcd";
826 clock-names = "ahb", "tcon-ch0";
827 clock-output-names = "tcon-pixel-clock";
830 reset-names = "lcd", "lvds";
831 #clock-cells = <0>;
834 #address-cells = <1>;
835 #size-cells = <0>;
839 #address-cells = <1>;
840 #size-cells = <0>;
844 remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>;
849 remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>;
855 #address-cells = <1>;
856 #size-cells = <0>;
860 remote-endpoint = <&dsi_in_tcon_lcd0>;
866 tcon_tv0: lcd-controller@5470000 {
867 compatible = "allwinner,sun20i-d1-tcon-tv";
872 clock-names = "ahb", "tcon-ch1";
874 reset-names = "lcd";
877 #address-cells = <1>;
878 #size-cells = <0>;
882 #address-cells = <1>;
883 #size-cells = <0>;
887 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
892 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
900 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
906 ppu: power-controller@7001000 {
907 compatible = "allwinner,sun20i-d1-ppu";
911 #power-domain-cells = <1>;
914 r_ccu: clock-controller@7010000 {
915 compatible = "allwinner,sun20i-d1-r-ccu";
921 clock-names = "hosc", "losc", "iosc", "pll-periph";
922 #clock-cells = <1>;
923 #reset-cells = <1>;
927 compatible = "allwinner,sun20i-d1-rtc",
928 "allwinner,sun50i-r329-rtc";
934 clock-names = "bus", "hosc", "ahb";
935 #clock-cells = <1>;