Lines Matching full:vp
117 __be64 vp; in xive_native_get_irq_config() local
120 rc = opal_xive_get_irq_config(hw_irq, &vp, prio, &lirq); in xive_native_get_irq_config()
122 *target = be64_to_cpu(vp); in xive_native_get_irq_config()
128 #define vp_err(vp, fmt, ...) pr_err("VP[0x%x]: " fmt, vp, ##__VA_ARGS__) argument
394 u32 vp; in xive_native_setup_cpu() local
401 /* Check if pool VP already active, if it is, pull it */ in xive_native_setup_cpu()
405 /* Enable the pool VP */ in xive_native_setup_cpu()
406 vp = xive_pool_vps + cpu; in xive_native_setup_cpu()
408 rc = opal_xive_set_vp_info(vp, OPAL_XIVE_VP_ENABLED, 0); in xive_native_setup_cpu()
414 pr_err("Failed to enable pool VP on CPU %d\n", cpu); in xive_native_setup_cpu()
419 rc = opal_xive_get_vp_info(vp, NULL, &vp_cam_be, NULL, NULL); in xive_native_setup_cpu()
421 pr_err("Failed to get pool VP info CPU %d\n", cpu); in xive_native_setup_cpu()
434 u32 vp; in xive_native_teardown_cpu() local
439 /* Pull the pool VP from the CPU */ in xive_native_teardown_cpu()
443 vp = xive_pool_vps + cpu; in xive_native_teardown_cpu()
445 rc = opal_xive_set_vp_info(vp, 0, 0); in xive_native_teardown_cpu()
538 pr_debug("Allocating VP block for pool size %u\n", nr_cpu_ids); in xive_native_setup_pools()
542 pr_err("Failed to allocate pool VP, KVM might not function\n"); in xive_native_setup_pools()
602 xive_has_save_restore = of_property_read_bool(np, "vp-save-restore"); in xive_native_init()
676 pr_debug("VP block alloc, for max VCPUs %d use order %d\n", in xive_native_alloc_vp_block()
710 pr_warn("OPAL error %lld freeing VP block\n", rc); in xive_native_free_vp_block()
728 vp_err(vp_id, "Failed to enable VP : %lld\n", rc); in xive_native_enable_vp()
744 vp_err(vp_id, "Failed to disable VP : %lld\n", rc); in xive_native_disable_vp()
757 vp_err(vp_id, "Failed to get VP info : %lld\n", rc); in xive_native_get_vp_info()
865 vp_err(vp_id, "failed to get vp state : %lld\n", rc); in xive_native_get_vp_state()