1 // SPDX-License-Identifier: GPL-2.0-only
7  * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11  * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
32 #include <linux/gpio/legacy-of-mm-gpiochip.h>
43 		return -ENODEV;  in cpm_init()
72 			  (CONFIG_PPC_EARLY_DEBUG_CPM_ADDR - PHYS_IMMR_BASE +  in udbg_init_cpm()
75 			 (in_be32(&cpm_udbg_txdesc[1]) - PHYS_IMMR_BASE +  in udbg_init_cpm()
95 	u32 dir, par, sor, odr, dat;  member
111 	struct cpm2_ioports __iomem *iop = mm_gc->regs;  in cpm2_gpio32_save_regs()
113 	cpm2_gc->cpdata = in_be32(&iop->dat);  in cpm2_gpio32_save_regs()
116 static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)  in cpm2_gpio32_get()  argument
119 	struct cpm2_ioports __iomem *iop = mm_gc->regs;  in cpm2_gpio32_get()
122 	pin_mask = 1 << (31 - gpio);  in cpm2_gpio32_get()
124 	return !!(in_be32(&iop->dat) & pin_mask);  in cpm2_gpio32_get()
130 	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(&mm_gc->gc);  in __cpm2_gpio32_set()
131 	struct cpm2_ioports __iomem *iop = mm_gc->regs;  in __cpm2_gpio32_set()
134 		cpm2_gc->cpdata |= pin_mask;  in __cpm2_gpio32_set()
136 		cpm2_gc->cpdata &= ~pin_mask;  in __cpm2_gpio32_set()
138 	out_be32(&iop->dat, cpm2_gc->cpdata);  in __cpm2_gpio32_set()
141 static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)  in cpm2_gpio32_set()  argument
146 	u32 pin_mask = 1 << (31 - gpio);  in cpm2_gpio32_set()
148 	spin_lock_irqsave(&cpm2_gc->lock, flags);  in cpm2_gpio32_set()
152 	spin_unlock_irqrestore(&cpm2_gc->lock, flags);  in cpm2_gpio32_set()
155 static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)  in cpm2_gpio32_dir_out()  argument
159 	struct cpm2_ioports __iomem *iop = mm_gc->regs;  in cpm2_gpio32_dir_out()
161 	u32 pin_mask = 1 << (31 - gpio);  in cpm2_gpio32_dir_out()
163 	spin_lock_irqsave(&cpm2_gc->lock, flags);  in cpm2_gpio32_dir_out()
165 	setbits32(&iop->dir, pin_mask);  in cpm2_gpio32_dir_out()
168 	spin_unlock_irqrestore(&cpm2_gc->lock, flags);  in cpm2_gpio32_dir_out()
173 static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)  in cpm2_gpio32_dir_in()  argument
177 	struct cpm2_ioports __iomem *iop = mm_gc->regs;  in cpm2_gpio32_dir_in()
179 	u32 pin_mask = 1 << (31 - gpio);  in cpm2_gpio32_dir_in()
181 	spin_lock_irqsave(&cpm2_gc->lock, flags);  in cpm2_gpio32_dir_in()
183 	clrbits32(&iop->dir, pin_mask);  in cpm2_gpio32_dir_in()
185 	spin_unlock_irqrestore(&cpm2_gc->lock, flags);  in cpm2_gpio32_dir_in()
192 	struct device_node *np = dev->of_node;  in cpm2_gpiochip_add32()
199 		return -ENOMEM;  in cpm2_gpiochip_add32()
201 	spin_lock_init(&cpm2_gc->lock);  in cpm2_gpiochip_add32()
203 	mm_gc = &cpm2_gc->mm_gc;  in cpm2_gpiochip_add32()
204 	gc = &mm_gc->gc;  in cpm2_gpiochip_add32()
206 	mm_gc->save_regs = cpm2_gpio32_save_regs;  in cpm2_gpiochip_add32()
207 	gc->ngpio = 32;  in cpm2_gpiochip_add32()
208 	gc->direction_input = cpm2_gpio32_dir_in;  in cpm2_gpiochip_add32()
209 	gc->direction_output = cpm2_gpio32_dir_out;  in cpm2_gpiochip_add32()
210 	gc->get = cpm2_gpio32_get;  in cpm2_gpiochip_add32()
211 	gc->set = cpm2_gpio32_set;  in cpm2_gpiochip_add32()
212 	gc->parent = dev;  in cpm2_gpiochip_add32()
213 	gc->owner = THIS_MODULE;  in cpm2_gpiochip_add32()