Lines Matching +full:0 +full:xc08
10 #define SDRAM_CTRL 0x104
16 #define GPIOW_GPIOE 0xc00
17 #define GPIOW_DDR 0xc08
18 #define GPIOW_DVO 0xc0c
20 #define CDM_CE 0x214
38 .space 0x5c*4
50 /* setup wakeup address for u-boot at physical location 0x0 */
55 stw r4, 0(r3)
60 * 0xf0 (0xe0->0x100 gets overwritten when BDI connected;
67 lwz r10, 0xf0(r3)
68 stw r10, (0x1d*4)(r4)
71 SAVE_SPRN(LR, 0x1c)
85 lwz r5, 0(r3)
86 stw r5, 0(r4)
157 li r4, 0x02
173 li r4, 0
205 LOAD_SPRN(HID1, 0x19)
207 LOAD_SPRN(HID2_750FX, 0x1a)
227 lwz r10, (4*0x1b)(r4)
240 lwz r10, (4*0x18)(r4)
247 /* restore 0xf0 (BDI2000) */
249 lwz r10, (0x1d*4)(r4)
250 stw r10, 0xf0(r3)
252 LOAD_SPRN(LR, 0x1c)
280 stw r0, 0(r4)
281 stw r1, 0x4(r4)
282 stw r2, 0x8(r4)
283 stmw r11, 0xc(r4) /* 0xc -> 0x5f, (0x18*4-1) */
285 SAVE_SPRN(HID0, 0x18)
286 SAVE_SPRN(HID1, 0x19)
288 SAVE_SPRN(HID2_750FX, 0x1a)
290 stw r10, (4*0x1b)(r4)
291 /*SAVE_SPRN(LR, 0x1c) have to save it before the call */
292 /* 0x1d reserved by 0xf0 */
293 SAVE_SPRN(RPA, 0x1e)
294 SAVE_SPRN(SDR1, 0x1f)
297 SAVE_BAT(0, 0x20)
298 SAVE_BAT(1, 0x24)
299 SAVE_BAT(2, 0x28)
300 SAVE_BAT(3, 0x2c)
301 SAVE_BAT(4, 0x30)
302 SAVE_BAT(5, 0x34)
303 SAVE_BAT(6, 0x38)
304 SAVE_BAT(7, 0x3c)
306 SAVE_4SR(0, 0x40)
307 SAVE_4SR(4, 0x44)
308 SAVE_4SR(8, 0x48)
309 SAVE_4SR(12, 0x4c)
311 SAVE_SPRN(SPRG0, 0x50)
312 SAVE_SPRN(SPRG1, 0x51)
313 SAVE_SPRN(SPRG2, 0x52)
314 SAVE_SPRN(SPRG3, 0x53)
315 SAVE_SPRN(SPRG4, 0x54)
316 SAVE_SPRN(SPRG5, 0x55)
317 SAVE_SPRN(SPRG6, 0x56)
318 SAVE_SPRN(SPRG7, 0x57)
320 SAVE_SPRN(IABR, 0x58)
321 SAVE_SPRN(DABR, 0x59)
322 SAVE_SPRN(TBRL, 0x5a)
323 SAVE_SPRN(TBRU, 0x5b)
353 lwz r0, 0(r4)
354 lwz r1, 0x4(r4)
355 lwz r2, 0x8(r4)
356 lmw r11, 0xc(r4)
361 * 0x18 - HID0
362 * 0x19 - HID1
363 * 0x1a - HID2
364 * 0x1b - MSR
365 * 0x1c - LR
366 * 0x1d - reserved by 0xf0 (BDI2000)
368 LOAD_SPRN(RPA, 0x1e);
369 LOAD_SPRN(SDR1, 0x1f);
372 LOAD_BAT(0, 0x20)
373 LOAD_BAT(1, 0x24)
374 LOAD_BAT(2, 0x28)
375 LOAD_BAT(3, 0x2c)
376 LOAD_BAT(4, 0x30)
377 LOAD_BAT(5, 0x34)
378 LOAD_BAT(6, 0x38)
379 LOAD_BAT(7, 0x3c)
381 LOAD_4SR(0, 0x40)
382 LOAD_4SR(4, 0x44)
383 LOAD_4SR(8, 0x48)
384 LOAD_4SR(12, 0x4c)
387 LOAD_SPRN(SPRG0, 0x50);
388 LOAD_SPRN(SPRG1, 0x51);
389 LOAD_SPRN(SPRG2, 0x52);
390 LOAD_SPRN(SPRG3, 0x53);
391 LOAD_SPRN(SPRG4, 0x54);
392 LOAD_SPRN(SPRG5, 0x55);
393 LOAD_SPRN(SPRG6, 0x56);
394 LOAD_SPRN(SPRG7, 0x57);
396 LOAD_SPRN(IABR, 0x58);
397 LOAD_SPRN(DABR, 0x59);
398 LOAD_SPRN(TBWL, 0x5a); /* these two have separate R/W regs */
399 LOAD_SPRN(TBWU, 0x5b);
420 lwz r4,0(r3)