1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Performance counter support for PPC970-family processors.
5  * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
17 #define PM_PMC_SH	12	/* PMC number (1-based) for direct events */
19 #define PM_UNIT_SH	8	/* TTMMUX number and setting - unit select */
22 #define PM_SPCSEL_MSK	3
23 #define PM_BYTE_SH	4	/* Byte number of event bus to use */
24 #define PM_BYTE_MSK	3
31 #define PM_ISU		3
53 #define MMCR1_TTMSEL_MSK	3
91  * SP - SPCSEL constraint
92  *     48-49: SPCSEL value 0x3_0000_0000_0000
94  * T0 - TTM0 constraint
95  *     46-47: TTM0SEL value (0=FPU, 2=IFU, 3=VPU) 0xC000_0000_0000
97  * T1 - TTM1 constraint
98  *     44-45: TTM1SEL value (0=IDU, 3=STS) 0x3000_0000_0000
100  * UC - unit constraint: can't have all three of FPU|IFU|VPU, ISU, IDU|STS
108  *     36-38: count of events needing PMC1/2/5/6 0x0070_0000_0000
112  *     32-34: count of events needing PMC3/4/7/8 0x0007_0000_0000
115  *     28-31: Byte 0 event source 0xf000_0000
119  *     24-27, 20-23, 16-19: Byte 1, 2, 3 event sources
123  *     14-15: Count of events needing PMC1
126  *     0-13: Count of events needing PMC2..PMC8
130 	(1<<2) | (1<<3),	/* PMC1: PM_MRK_GRP_DISP, PM_MRK_ST_CMPL */
131 	(1<<3) | (1<<5),	/* PMC2: PM_THRESH_TIMEO, PM_MRK_BRU_FIN */
132 	(1<<3) | (1<<5),	/* PMC3: PM_MRK_ST_CMPL_INT, PM_MRK_VMX_FIN */
135 	(1<<3) | (1<<4) | (1<<5),
147 	int pmc, psel, unit, byte, bit;  in p970_marked_instr_event()  local
153 		if (direct_marked_event[pmc - 1] & (1 << psel))  in p970_marked_instr_event()
156 			bit = (pmc <= 4)? pmc - 1: 8 - pmc;  in p970_marked_instr_event()
164 	byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;  in p970_marked_instr_event()
169 		mask = 0x4c;		/* byte 0 bits 2,3,6 */  in p970_marked_instr_event()
172 		/* byte 2 bits 0,2,3,4,6; all of byte 1 */  in p970_marked_instr_event()
176 		mask = 0x50 << 24;	/* byte 3 bits 4,6 */  in p970_marked_instr_event()
179 	return (mask >> (byte * 8 + bit)) & 1;  in p970_marked_instr_event()
195 	int pmc, byte, unit, sh, spcsel;  in p970_get_constraint()  local
197 	int grp = -1;  in p970_get_constraint()
202 			return -1;  in p970_get_constraint()
203 		sh = (pmc - 1) * 2;  in p970_get_constraint()
206 		grp = ((pmc - 1) >> 1) & 1;  in p970_get_constraint()
211 			return -1;  in p970_get_constraint()
214 		byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;  in p970_get_constraint()
217 		 * on PMC1/2/5/6; bytes 1 and 3 on PMC3/4/7/8.  in p970_get_constraint()
220 			grp = byte & 1;  in p970_get_constraint()
221 		/* Set byte lane select field */  in p970_get_constraint()
222 		mask  |= 0xfULL << (28 - 4 * byte);  in p970_get_constraint()
223 		value |= (unsigned long)unit << (28 - 4 * byte);  in p970_get_constraint()
236 		mask  |= 3ull << 48;  in p970_get_constraint()
263 	unsigned int pmc, unit, byte, psel;  in p970_compute_mmcr()  local
269 	unsigned char unitmap[] = { 0, 0<<3, 3<<3, 1<<3, 2<<3, 0|4, 3|4 };  in p970_compute_mmcr()
276 		return -1;  in p970_compute_mmcr()
285 			if (pmc_inuse & (1 << (pmc - 1)))  in p970_compute_mmcr()
286 				return -1;  in p970_compute_mmcr()
287 			pmc_inuse |= 1 << (pmc - 1);  in p970_compute_mmcr()
288 			/* count 1/2/5/6 vs 3/4/7/8 use */  in p970_compute_mmcr()
289 			++pmc_grp_use[((pmc - 1) >> 1) & 1];  in p970_compute_mmcr()
292 		byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;  in p970_compute_mmcr()
295 				return -1;  in p970_compute_mmcr()
297 				++pmc_grp_use[byte & 1];  in p970_compute_mmcr()
298 			if (busbyte[byte] && busbyte[byte] != unit)  in p970_compute_mmcr()
299 				return -1;  in p970_compute_mmcr()
300 			busbyte[byte] = unit;  in p970_compute_mmcr()
305 		return -1;  in p970_compute_mmcr()
327 		return -1;  in p970_compute_mmcr()
329 	/* Set byte lane select fields and TTM3SEL. */  in p970_compute_mmcr()
330 	for (byte = 0; byte < 4; ++byte) {  in p970_compute_mmcr()
331 		unit = busbyte[byte];  in p970_compute_mmcr()
339 			ttm = 3;  in p970_compute_mmcr()
340 			if (unit == PM_LSU1L && byte >= 2)  in p970_compute_mmcr()
341 				mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte);  in p970_compute_mmcr()
344 			<< (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte);  in p970_compute_mmcr()
352 		byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;  in p970_compute_mmcr()
355 			/* Bus event or any-PMC direct event */  in p970_compute_mmcr()
357 				psel |= 0x10 | ((byte & 2) << 2);  in p970_compute_mmcr()
365 					if (grp == (byte & 1))  in p970_compute_mmcr()
375 			--pmc;  in p970_compute_mmcr()
376 			if (psel == 0 && (byte & 2))  in p970_compute_mmcr()
377 				/* add events on higher-numbered bus */  in p970_compute_mmcr()
388 		mmcr0 |= pmcsel[pmc] << (MMCR0_PMC1SEL_SH - 7 * pmc);  in p970_compute_mmcr()
391 			<< (MMCR1_PMC3SEL_SH - 5 * (pmc - 2));  in p970_compute_mmcr()
400 	mmcr->mmcr0 = mmcr0;  in p970_compute_mmcr()
401 	mmcr->mmcr1 = mmcr1;  in p970_compute_mmcr()
402 	mmcr->mmcra = mmcra;  in p970_compute_mmcr()
414 		shift = MMCR0_PMC1SEL_SH - 7 * pmc;  in p970_disable_pmc()
415 		mmcr->mmcr0 = (mmcr->mmcr0 & ~(0x1fUL << shift)) | (0x08UL << shift);  in p970_disable_pmc()
417 		shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2);  in p970_disable_pmc()
418 		mmcr->mmcr1 = (mmcr->mmcr1 & ~(0x1fUL << shift)) | (0x08UL << shift);  in p970_disable_pmc()
434  * Table of generalized cache-related events.
435  * 0 means not supported, -1 means nonsensical, other values
446 		[C(OP_WRITE)] = {	-1,		-1	},
456 		[C(OP_WRITE)] = {	-1,		-1	},
457 		[C(OP_PREFETCH)] = {	-1,		-1	},
461 		[C(OP_WRITE)] = {	-1,		-1	},
462 		[C(OP_PREFETCH)] = {	-1,		-1	},
466 		[C(OP_WRITE)] = {	-1,		-1	},
467 		[C(OP_PREFETCH)] = {	-1,		-1	},
470 		[C(OP_READ)] = {	-1,		-1	},
471 		[C(OP_WRITE)] = {	-1,		-1	},
472 		[C(OP_PREFETCH)] = {	-1,		-1	},
498 		return -ENODEV;  in init_ppc970_pmu()