Lines Matching full:pmc

16 PMU_FORMAT_ATTR(pmc,		"config:16-19");
47 	/* Only check pmc, unit and pmcxsel, ignore the edge bit (0) */
172 static unsigned long combine_shift(unsigned long pmc)
175 		return p9_MMCR1_COMBINE_SHIFT(pmc);
177 	return MMCR1_COMBINE_SHIFT(pmc);
415 	unsigned int unit, pmc, cache, ebb;
423 	pmc   = (event >> EVENT_PMC_SHIFT)        & EVENT_PMC_MASK;
433 	if (pmc) {
436 		if (pmc > 6)
442 		if (pmc >= 5 && base_event != 0x500fa &&
446 		mask  |= CNST_PMC_MASK(pmc);
447 		value |= CNST_PMC_VAL(pmc);
455 		if (pmc >= 5)
459 	if (pmc <= 4) {
462 		 * a PMC of 0 - they still need a PMC, it's just assigned later.
463 		 * Don't count events on PMC 5 & 6, there is only one valid event
481 			if (pmc == 4)
543 	if (!pmc && ebb)
544 		/* EBB events must specify the PMC */
576 	unsigned int pmc, pmc_inuse;
583 		pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
584 		if (pmc)
585 			pmc_inuse |= 1 << pmc;
599 		pmc     = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
604 		if (!pmc) {
605 			for (pmc = 1; pmc <= 4; ++pmc) {
606 				if (!(pmc_inuse & (1 << pmc)))
610 			pmc_inuse |= 1 << pmc;
613 		if (pmc <= 4) {
614 			mmcr1 |= unit << MMCR1_UNIT_SHIFT(pmc);
615 			mmcr1 |= combine << combine_shift(pmc);
616 			mmcr1 |= psel << MMCR1_PMCSEL_SHIFT(pmc);
689 			mmcr2 |= MMCR2_FCP(pmc);
692 			mmcr2 |= MMCR2_FCH(pmc);
696 				mmcr2 |= MMCR2_FCH(pmc);
698 				mmcr2 |= MMCR2_FCS(pmc);
702 			mmcr2 |= MMCR2_FCWAIT(pmc);
705 			if (pmc <= 4) {
708 				mmcr3 |= val << MMCR3_SHIFT(pmc);
712 		hwc[i] = pmc - 1;
725 	/* If we're not using PMC 5 or 6, freeze them */
745 void isa207_disable_pmc(unsigned int pmc, struct mmcr_regs *mmcr)
747 	if (pmc <= 3)
748 		mmcr->mmcr1 &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1));