Lines Matching refs:r11
51 stw r11, THREAD_NORMSAVE(0)(r10); \
54 mfspr r11, SPRN_SRR1; \
56 andi. r11, r11, MSR_PR; /* check whether user or kernel */\
57 LOAD_REG_IMMEDIATE(r11, MSR_KERNEL); \
58 mtmsr r11; \
59 mr r11, r1; \
61 BOOKE_CLEAR_BTB(r11) \
63 lwz r11, TASK_STACK - THREAD(r10); \
64 ALLOC_STACK_FRAME(r11, THREAD_SIZE); \
65 1 : subi r11, r11, INT_FRAME_SIZE; /* Allocate exception frame */ \
66 stw r13, _CCR(r11); /* save various registers */ \
67 stw r12,GPR12(r11); \
68 stw r9,GPR9(r11); \
70 stw r13, GPR10(r11); \
72 stw r12,GPR11(r11); \
75 stw r10,_LINK(r11); \
77 stw r1, GPR1(r11); \
79 stw r1, 0(r11); \
80 mr r1, r11; \
120 stw r11, THREAD_NORMSAVE(0)(r10)
123 mfspr r11, SPRN_SRR1
124 mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */
137 BOOKE_CLEAR_BTB(r11)
138 mr r11, r1
198 stw r11,GPR11(r8); \
200 mfspr r11,exc_level_srr1; /* check whether user or kernel */\
203 andi. r11,r11,MSR_PR; \
204 LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)); \
205 mtmsr r11; \
206 mfspr r11,SPRN_SPRG_THREAD; /* if from user, start at top of */\
207 lwz r11, TASK_STACK - THREAD(r11); /* this thread's kernel stack */\
208 addi r11,r11,THREAD_SIZE - INT_FRAME_SIZE; /* allocate stack frame */\
211 stw r9,_CCR(r11); /* save CR */\
214 stw r10,GPR10(r11); \
216 stw r9,GPR9(r11); \
217 stw r10,GPR11(r11); \
220 1: mr r11, r8; \
222 stw r12,GPR12(r11); /* save various registers */\
224 stw r10,_LINK(r11); \
226 stw r12,_DEAR(r11); /* since they may have had stuff */\
228 stw r9,_ESR(r11); /* exception was taken */\
230 stw r1,GPR1(r11); \
232 stw r1,0(r11); \
233 mr r1,r11; \
285 stw r11, THREAD_NORMSAVE(0)(r10); \
286 mfspr r11, SPRN_SRR1; \
319 stw r5,_ESR(r11); \
372 lwz r10,_CCR(r11); \
373 lwz r0,GPR0(r11); \
374 lwz r1,GPR1(r11); \
378 lwz r9,GPR9(r11); \
379 lwz r12,GPR12(r11); \
383 lwz r11,GPR11(r8); \
391 stw r4,_ESR(r11); /* DebugException takes DBSR in _ESR */\
430 lwz r10,_CCR(r11); \
431 lwz r0,GPR0(r11); \
432 lwz r1,GPR1(r11); \
436 lwz r9,GPR9(r11); \
437 lwz r12,GPR12(r11); \
441 lwz r11,GPR11(r8); \
449 stw r4,_ESR(r11); /* DebugException takes DBSR in _ESR */\
460 stw r5,_ESR(r11); \
462 stw r4, _DEAR(r11); \
480 stw r5,_ESR(r11); \
481 stw r12, _DEAR(r11); /* Set regs->dear (dar) to SRR0 */ \
490 stw r4,_DEAR(r11); \
500 stw r4,_ESR(r11); \