Lines Matching refs:r10
49 mtspr SPRN_SPRG_WSCRATCH0, r10; /* save one register */ \
50 mfspr r10, SPRN_SPRG_THREAD; \
51 stw r11, THREAD_NORMSAVE(0)(r10); \
52 stw r13, THREAD_NORMSAVE(2)(r10); \
63 lwz r11, TASK_STACK - THREAD(r10); \
71 lwz r12, THREAD_NORMSAVE(0)(r10); \
73 lwz r13, THREAD_NORMSAVE(2)(r10); /* restore r13 */ \
74 mflr r10; \
75 stw r10,_LINK(r11); \
86 lis r10, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
87 addi r10, r10, STACK_FRAME_REGS_MARKER@l
88 stw r10, STACK_INT_FRAME_MARKER(r1)
89 li r10, \trapno
90 stw r10,_TRAP(r1)
96 mfctr r10
98 stw r10,_CTR(r1)
100 mfspr r10,SPRN_XER
102 stw r10,_XER(r1)
116 mfspr r10, SPRN_SPRG_THREAD
119 mtspr SPRN_SPRG_WSCRATCH0, r10
120 stw r11, THREAD_NORMSAVE(0)(r10)
121 stw r13, THREAD_NORMSAVE(2)(r10)
129 lwz r13, THREAD_NORMSAVE(2)(r10)
139 lwz r1, TASK_STACK - THREAD(r10)
197 stw r10,GPR10(r8); \
202 BOOKE_CLEAR_BTB(r10) \
212 lwz r10,GPR10(r8); /* copy regs from exception stack */\
214 stw r10,GPR10(r11); \
215 lwz r10,GPR11(r8); \
217 stw r10,GPR11(r11); \
223 mflr r10; \
224 stw r10,_LINK(r11); \
283 mtspr SPRN_SPRG_WSCRATCH0, r10; /* save one register */ \
284 mfspr r10, SPRN_SPRG_THREAD; \
285 stw r11, THREAD_NORMSAVE(0)(r10); \
287 stw r13, THREAD_NORMSAVE(2)(r10); \
353 mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
354 andis. r10,r10,(DBSR_IC|DBSR_BT)@h; \
357 lis r10,interrupt_base@h; /* check if exception in vectors */ \
358 ori r10,r10,interrupt_base@l; \
359 cmplw r12,r10; \
362 lis r10,interrupt_end@h; \
363 ori r10,r10,interrupt_end@l; \
364 cmplw r12,r10; \
369 lis r10,(DBSR_IC|DBSR_BT)@h; /* clear the IC event */ \
370 mtspr SPRN_DBSR,r10; \
372 lwz r10,_CCR(r11); \
375 mtcrf 0x80,r10; \
382 lwz r10,GPR10(r8); \
411 mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
412 andis. r10,r10,(DBSR_IC|DBSR_BT)@h; \
415 lis r10,interrupt_base@h; /* check if exception in vectors */ \
416 ori r10,r10,interrupt_base@l; \
417 cmplw r12,r10; \
420 lis r10,interrupt_end@h; \
421 ori r10,r10,interrupt_end@l; \
422 cmplw r12,r10; \
427 lis r10,(DBSR_IC|DBSR_BT)@h; /* clear the IC event */ \
428 mtspr SPRN_DBSR,r10; \
430 lwz r10,_CCR(r11); \
433 mtcrf 0x80,r10; \
440 lwz r10,GPR10(r8); \