1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <asm/pci-bridge.h>
21 #include <asm/ppc-pci.h>
27  * eeh_set_pe_aux_size - Set PE auxiliary data size
41  * eeh_pe_alloc - Allocate PE
63 	pe->type = type;  in eeh_pe_alloc()
64 	pe->phb = phb;  in eeh_pe_alloc()
65 	INIT_LIST_HEAD(&pe->child_list);  in eeh_pe_alloc()
66 	INIT_LIST_HEAD(&pe->edevs);  in eeh_pe_alloc()
68 	pe->data = (void *)pe + ALIGN(sizeof(struct eeh_pe),  in eeh_pe_alloc()
74  * eeh_phb_pe_create - Create PHB PE
88 		return -ENOMEM;  in eeh_phb_pe_create()
92 	list_add_tail(&pe->child, &eeh_phb_pe);  in eeh_phb_pe_create()
94 	pr_debug("EEH: Add PE for PHB#%x\n", phb->global_number);  in eeh_phb_pe_create()
100  * eeh_wait_state - Wait for PE state
124 		ret = eeh_ops->get_state(pe, &mwait);  in eeh_wait_state()
146 		max_wait -= mwait;  in eeh_wait_state()
151  * eeh_phb_pe_get - Retrieve PHB PE based on the given PHB
168 		if ((pe->type & EEH_PE_PHB) && pe->phb == phb)  in eeh_phb_pe_get()
176  * eeh_pe_next - Retrieve the next PE in the tree
185 	struct list_head *next = pe->child_list.next;  in eeh_pe_next()
187 	if (next == &pe->child_list) {  in eeh_pe_next()
191 			next = pe->child.next;  in eeh_pe_next()
192 			if (next != &pe->parent->child_list)  in eeh_pe_next()
194 			pe = pe->parent;  in eeh_pe_next()
202  * eeh_pe_traverse - Traverse PEs in the specified PHB
227  * eeh_pe_dev_traverse - Traverse the devices from the PE
254  * __eeh_pe_get - Check the PE address
266 	if (pe->type & EEH_PE_PHB)  in __eeh_pe_get()
269 	if (*target_pe == pe->addr)  in __eeh_pe_get()
276  * eeh_pe_get - Search PE based on the given address
295  * eeh_pe_tree_insert - Add EEH device to parent PE
299  * Add EEH device to the PE in edev->pe_config_addr. If a PE already
309 	struct pci_controller *hose = edev->controller;  in eeh_pe_tree_insert()
318 	pe = eeh_pe_get(hose, edev->pe_config_addr);  in eeh_pe_tree_insert()
320 		if (pe->type & EEH_PE_INVALID) {  in eeh_pe_tree_insert()
321 			list_add_tail(&edev->entry, &pe->edevs);  in eeh_pe_tree_insert()
322 			edev->pe = pe;  in eeh_pe_tree_insert()
329 				if (!(parent->type & EEH_PE_INVALID))  in eeh_pe_tree_insert()
331 				parent->type &= ~EEH_PE_INVALID;  in eeh_pe_tree_insert()
332 				parent = parent->parent;  in eeh_pe_tree_insert()
336 				     pe->parent->addr);  in eeh_pe_tree_insert()
339 			pe->type = EEH_PE_BUS;  in eeh_pe_tree_insert()
340 			edev->pe = pe;  in eeh_pe_tree_insert()
343 			list_add_tail(&edev->entry, &pe->edevs);  in eeh_pe_tree_insert()
350 	if (edev->physfn)  in eeh_pe_tree_insert()
356 		return -ENOMEM;  in eeh_pe_tree_insert()
359 	pe->addr = edev->pe_config_addr;  in eeh_pe_tree_insert()
371 				__func__, hose->global_number);  in eeh_pe_tree_insert()
372 			edev->pe = NULL;  in eeh_pe_tree_insert()
374 			return -EEXIST;  in eeh_pe_tree_insert()
379 	pe->parent = new_pe_parent;  in eeh_pe_tree_insert()
380 	list_add_tail(&pe->child, &new_pe_parent->child_list);  in eeh_pe_tree_insert()
386 	list_add_tail(&edev->entry, &pe->edevs);  in eeh_pe_tree_insert()
387 	edev->pe = pe;  in eeh_pe_tree_insert()
389 		     new_pe_parent->addr);  in eeh_pe_tree_insert()
395  * eeh_pe_tree_remove - Remove one EEH device from the associated PE
412 		return -EEXIST;  in eeh_pe_tree_remove()
416 	edev->pe = NULL;  in eeh_pe_tree_remove()
417 	list_del(&edev->entry);  in eeh_pe_tree_remove()
426 		parent = pe->parent;  in eeh_pe_tree_remove()
429 		if (pe->type & EEH_PE_PHB)  in eeh_pe_tree_remove()
437 		keep = !!(pe->state & EEH_PE_KEEP);  in eeh_pe_tree_remove()
438 		recover = !!(pe->state & EEH_PE_RECOVERING);  in eeh_pe_tree_remove()
442 			if (list_empty(&pe->edevs) &&  in eeh_pe_tree_remove()
443 			    list_empty(&pe->child_list)) {  in eeh_pe_tree_remove()
444 				list_del(&pe->child);  in eeh_pe_tree_remove()
459 			if (list_empty(&pe->edevs)) {  in eeh_pe_tree_remove()
461 				list_for_each_entry(child, &pe->child_list, child) {  in eeh_pe_tree_remove()
462 					if (!(child->type & EEH_PE_INVALID)) {  in eeh_pe_tree_remove()
469 					pe->type |= EEH_PE_INVALID;  in eeh_pe_tree_remove()
482  * eeh_pe_update_time_stamp - Update PE's frozen time stamp
496 	if (pe->freeze_count <= 0) {  in eeh_pe_update_time_stamp()
497 		pe->freeze_count = 0;  in eeh_pe_update_time_stamp()
498 		pe->tstamp = ktime_get_seconds();  in eeh_pe_update_time_stamp()
501 		if (tstamp - pe->tstamp > 3600) {  in eeh_pe_update_time_stamp()
502 			pe->tstamp = tstamp;  in eeh_pe_update_time_stamp()
503 			pe->freeze_count = 0;  in eeh_pe_update_time_stamp()
509  * eeh_pe_state_mark - Mark specified state for PE and its associated device
521 		if (!(pe->state & EEH_PE_REMOVED))  in eeh_pe_state_mark()
522 			pe->state |= state;  in eeh_pe_state_mark()
542 		list_for_each_entry(edev, &pe->edevs, entry) {  in eeh_pe_mark_isolated()
545 				pdev->error_state = pci_channel_io_frozen;  in eeh_pe_mark_isolated()
548 		if (pe->state & EEH_PE_CFG_RESTRICTED)  in eeh_pe_mark_isolated()
549 			pe->state |= EEH_PE_CFG_BLOCKED;  in eeh_pe_mark_isolated()
558 	edev->mode |= mode;  in __eeh_pe_dev_mode_mark()
562  * eeh_pe_dev_state_mark - Mark state for all device under the PE
573  * eeh_pe_state_clear - Clear state for the PE
576  * @include_passed: include passed-through devices?
590 		if (pe->state & EEH_PE_REMOVED)  in eeh_pe_state_clear()
596 		pe->state &= ~state;  in eeh_pe_state_clear()
606 		pe->check_count = 0;  in eeh_pe_state_clear()
612 			pdev->error_state = pci_channel_io_normal;  in eeh_pe_state_clear()
616 		if (pe->state & EEH_PE_CFG_RESTRICTED)  in eeh_pe_state_clear()
617 			pe->state &= ~EEH_PE_CFG_BLOCKED;  in eeh_pe_state_clear()
625  * the PCI-CFG registers have been restored for the parent
628  * Don't use normal PCI-CFG accessors, which probably has been
642 	if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))  in eeh_bridge_check_link()
648 	cap = edev->pcie_cap;  in eeh_bridge_check_link()
649 	eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val);  in eeh_bridge_check_link()
656 	eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val);  in eeh_bridge_check_link()
658 		eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val);  in eeh_bridge_check_link()
660 			eeh_edev_dbg(edev, "In power-off state, power it on ...\n");  in eeh_bridge_check_link()
663 			eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val);  in eeh_bridge_check_link()
669 	eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val);  in eeh_bridge_check_link()
671 	eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val);  in eeh_bridge_check_link()
674 	if (!edev->pdev->link_active_reporting) {  in eeh_bridge_check_link()
686 		eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val);  in eeh_bridge_check_link()
698 #define BYTE_SWAP(OFF)	(8*((OFF)/4)+3-(OFF))
699 #define SAVED_BYTE(OFF)	(((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
706 	 * Device BARs: 0x10 - 0x18  in eeh_restore_bridge_bars()
707 	 * Bus numbers and windows: 0x18 - 0x30  in eeh_restore_bridge_bars()
710 		eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]);  in eeh_restore_bridge_bars()
712 	eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]);  in eeh_restore_bridge_bars()
715 	eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1,  in eeh_restore_bridge_bars()
717 	eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1,  in eeh_restore_bridge_bars()
720 	eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]);  in eeh_restore_bridge_bars()
723 	eeh_ops->write_config(edev, PCI_COMMAND, 4, edev->config_space[1] |  in eeh_restore_bridge_bars()
736 		eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]);  in eeh_restore_device_bars()
738 	eeh_ops->write_config(edev, 12*4, 4, edev->config_space[12]);  in eeh_restore_device_bars()
740 	eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1,  in eeh_restore_device_bars()
742 	eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1,  in eeh_restore_device_bars()
746 	eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]);  in eeh_restore_device_bars()
752 	eeh_ops->read_config(edev, PCI_COMMAND, 4, &cmd);  in eeh_restore_device_bars()
753 	if (edev->config_space[1] & PCI_COMMAND_PARITY)  in eeh_restore_device_bars()
757 	if (edev->config_space[1] & PCI_COMMAND_SERR)  in eeh_restore_device_bars()
761 	eeh_ops->write_config(edev, PCI_COMMAND, 4, cmd);  in eeh_restore_device_bars()
765  * eeh_restore_one_device_bars - Restore the Base Address Registers for one device
776 	if (edev->mode & EEH_DEV_BRIDGE)  in eeh_restore_one_device_bars()
781 	if (eeh_ops->restore_config)  in eeh_restore_one_device_bars()
782 		eeh_ops->restore_config(edev);  in eeh_restore_one_device_bars()
786  * eeh_pe_restore_bars - Restore the PCI config space info
802  * eeh_pe_loc_get - Retrieve location code binding to the given PE
805  * Retrieve the location code of the given PE. If the primary PE bus
806  * is root bus, we will grab location code from PHB device tree node
808  * of the primary PE bus will be checked for the location code.
814 	const char *loc = NULL;  in eeh_pe_loc_get()  local
819 			bus = bus->parent;  in eeh_pe_loc_get()
824 			loc = of_get_property(dn, "ibm,io-base-loc-code", NULL);  in eeh_pe_loc_get()
826 			loc = of_get_property(dn, "ibm,slot-location-code",  in eeh_pe_loc_get()
829 		if (loc)  in eeh_pe_loc_get()
830 			return loc;  in eeh_pe_loc_get()
832 		bus = bus->parent;  in eeh_pe_loc_get()
839  * eeh_pe_bus_get - Retrieve PCI bus according to the given PE
854 	if (pe->type & EEH_PE_PHB)  in eeh_pe_bus_get()
855 		return pe->phb->bus;  in eeh_pe_bus_get()
858 	if (pe->state & EEH_PE_PRI_BUS)  in eeh_pe_bus_get()
859 		return pe->bus;  in eeh_pe_bus_get()
862 	edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, entry);  in eeh_pe_bus_get()
866 		bus = pdev->bus;  in eeh_pe_bus_get()