Lines Matching +full:sync +full:- +full:write
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
35 * It just marks the page as not i-cache clean. We do the i-cache
43 if (test_bit(PG_dcache_clean, &folio->flags.f)) in flush_dcache_folio()
44 clear_bit(PG_dcache_clean, &folio->flags.f); in flush_dcache_folio()
63 * flush_dcache_range(): Write any modified data cache blocks out to memory and
74 void *addr = (void *)(start & ~(bytes - 1)); in flush_dcache_range()
75 unsigned long size = stop - (unsigned long)addr + (bytes - 1); in flush_dcache_range()
79 mb(); /* sync */ in flush_dcache_range()
83 mb(); /* sync */ in flush_dcache_range()
88 * Write any modified data cache blocks out to memory.
96 void *addr = (void *)(start & ~(bytes - 1)); in clean_dcache_range()
97 unsigned long size = stop - (unsigned long)addr + (bytes - 1); in clean_dcache_range()
102 mb(); /* sync */ in clean_dcache_range()
106 * Like above, but invalidate the D-cache. This is used by the 8xx
108 * from the CPM (no cache snooping here :-).
115 void *addr = (void *)(start & ~(bytes - 1)); in invalidate_dcache_range()
116 unsigned long size = stop - (unsigned long)addr + (bytes - 1); in invalidate_dcache_range()
121 mb(); /* sync */ in invalidate_dcache_range()
134 #include <asm-generic/cacheflush.h>