Lines Matching +full:0 +full:x04000000
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0x00000000>;
34 clock-frequency = <0>; /* Filled in by zImage */
35 timebase-frequency = <0>; /* Filled in by zImage */
47 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
53 cell-index = <0>;
54 dcr-reg = <0x0c0 0x009>;
55 #address-cells = <0>;
56 #size-cells = <0>;
64 dcr-reg = <0x0d0 0x009>;
65 #address-cells = <0>;
66 #size-cells = <0>;
68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 dcr-reg = <0x00e 0x002>;
79 dcr-reg = <0x00c 0x002>;
87 clock-frequency = <0>; /* Filled in by zImage */
91 dcr-reg = <0x010 0x002>;
96 dcr-reg = <0x100 0x027>;
101 dcr-reg = <0x180 0x062>;
105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
107 #address-cells = <0>;
108 #size-cells = <0>;
109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
111 /*SERR*/ 0x2 &UIC1 0x0 0x4
112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
120 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
121 0x80000000 0x00000000 0x80000000 0x80000000>;
123 interrupts = <0x7 0x4>;
124 clock-frequency = <0>; /* Filled in by zImage */
128 dcr-reg = <0x012 0x002>;
131 clock-frequency = <0>; /* Filled in by zImage */
132 interrupts = <0x5 0x1>;
135 fpga@2,0 {
137 reg = <0x00000002 0x00000000 0x00001000>;
138 interrupts = <0x18 0x8>;
144 reg = <0x00000002 0x00002000 0x00000200>;
149 reg = <0x00000002 0x00004000 0x00004000>;
152 nor@0,0 {
155 reg = <0x00000000 0x00000000 0x00400000>;
159 partition@0 {
161 reg = <0x00000000 0x00010000>;
165 reg = <0x0300000 0x00040000>;
169 reg = <0x0340000 0x00040000>;
173 reg = <0x0380000 0x00080000>;
177 ndfc@1,0 {
179 reg = <0x00000001 0x00000000 0x00002000>;
180 ccr = <0x00001000>;
181 bank-settings = <0x80002222>;
189 partition@0 {
191 reg = <0x00000000 0x00200000>;
195 reg = <0x00200000 0x03E00000>;
199 reg = <0x04000000 0x04000000>;
203 reg = <0x08000000 0x04000000>;
207 reg = <0x0C000000 0x04000000>;
216 reg = <0xef600300 0x00000008>;
217 virtual-reg = <0xef600300>;
218 clock-frequency = <0>; /* Filled in by zImage */
221 interrupts = <0x0 0x4>;
226 reg = <0xef600700 0x00000014>;
228 interrupts = <0x2 0x4>;
230 #size-cells = <0>;
234 reg = <0x4a>;
235 interrupts = <0x19 0x8>;
242 reg = <0x52>;
248 reg = <0xef600b00 0x00000048>;
255 reg = <0xef600c00 0x00000048>;
263 gpios = <&GPIO1 0 0>;
266 gpios = <&GPIO1 1 0>;
272 reg = <0xef600d00 0x0000000c>;
279 interrupts = <0x1c 0x4 0x1d 0x4>;
280 reg = <0xef600e00 0x00000070>;
283 mal-tx-channel = <0 1>;
284 mal-rx-channel = <0>;
285 cell-index = <0>;
290 phy-map = <0x00000000>;
292 zmii-channel = <0>;
297 reg = <0xef601000 0x00000080>;
298 interrupts = <0x8 0x1 0x9 0x1>;