Lines Matching +full:0 +full:x24000

27 		#size-cells = <0>;
29 		PowerPC,8544@0 {
31 			reg = <0>;
34 			d-cache-size = <0x8000>;	// L1, 32K
35 			i-cache-size = <0x8000>;	// L1, 32K
36 			timebase-frequency = <0>;
37 			bus-frequency = <0>;
38 			clock-frequency = <0>;
45 		reg = <0x00000000 0x00000000>;	// Filled in by U-Boot
53 		ranges = <0x00000000 0xe0000000 0x00100000>;
54 		bus-frequency = <0>;		// Filled in by U-Boot
57 		ecm-law@0 {
59 			reg = <0x0 0x1000>;
65 			reg = <0x1000 0x1000>;
72 			reg = <0x2000 0x1000>;
79 			reg = <0x20000 0x1000>;
81 			cache-size = <0x40000>;	// L2, 256K
88 			#size-cells = <0>;
89 			cell-index = <0>;
91 			reg = <0x3000 0x100>;
98 				reg = <0x28>;
102 				reg = <0x32>;
108 				reg = <0x4c>;
112 				reg = <0x4a>;
120 			#size-cells = <0>;
123 			reg = <0x3100 0x100>;
132 			cell-index = <0>;
136 			reg = <0x24000 0x1000>;
137 			ranges = <0x0 0x24000 0x1000>;
147 				#size-cells = <0>;
149 				reg = <0x520 0x20>;
151 				phy0: ethernet-phy@0 {
153 					interrupts = <0 1>;
154 					reg = <0>;
158 					interrupts = <0 1>;
162 					reg = <0x11>;
174 			reg = <0x26000 0x1000>;
175 			ranges = <0x0 0x26000 0x1000>;
185 				#size-cells = <0>;
187 				reg = <0x520 0x20>;
190 					reg = <0x11>;
196 			cell-index = <0>;
199 			reg = <0x4500 0x100>;
200 			clock-frequency = <0>;
209 			reg = <0x4600 0x100>;
210 			clock-frequency = <0>;
217 			reg = <0xe0000 0x1000>;
223 			#address-cells = <0>;
225 			reg = <0x40000 0x40000>;
238 		reg = <0xe0005000 0x40>;
242 		ranges = <0 0 0xfc000000 0x04000000
243 			  2 0 0xc8000000 0x04000000
244 			  3 0 0xc0000000 0x00100000
247 		nor_flash@0,0 {
250 			reg = <0x0 0x000000 0x4000000>;
253 			partition@0 {
255 				reg = <0x0 0x1e0000>;
260 				reg = <0x1e0000 0x20000>;
264 				reg = <0x200000 0x200000>;
268 				reg = <0x400000 0x3b80000>;
272 				reg = <0x3f80000 0x40000>;
277 				reg = <0x3fc0000 0x40000>;
282 		display@2,0 {
284 			reg = <2 0x0 0x4000000>;
291 			reg = <3 0x10 0x10>;
301 			reg = <3 0x60 0x10>;
302 			interrupts = <8 4 0>;	// number, type, routing
308 			reg = <3 0x70 0x04>;
312 			data@0 {
314 				reg = <0x0 0x40000000>;
320 			reg = <3 0x100 0x80>;
332 		reg = <0xe0008000 0x1000>;
335 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
337 				/* IDSEL 0x11 */
338 				 0x8800 0x0 0x0 1 &mpic 5 1
339 				/* IDSEL 0x12 */
340 				 0x9000 0x0 0x0 1 &mpic 4 1>;
343 		bus-range = <0x0 0x0>;
344 		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
345 			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;