Lines Matching +full:8 +full:x8
52 interrupts = <77 0x8>;
112 interrupts = <74 0x8>;
121 interrupts = <75 0x8>;
139 interrupts = <14 0x8>;
170 interrupts = <42 0x8>;
184 interrupts = <15 0x8>;
193 interrupts = <16 0x8>;
205 interrupts = <71 8>;
212 interrupts = <71 8>;
219 interrupts = <71 8>;
226 interrupts = <71 8>;
233 interrupts = <71 8>;
243 interrupts = <38 0x8>;
258 interrupts = <32 0x8 33 0x8 34 0x8>;
274 interrupts = <17 0x8>;
295 interrupts = <35 0x8 36 0x8 37 0x8>;
322 interrupts = <9 0x8>;
332 interrupts = <10 0x8>;
340 interrupts = <11 0x8>;
352 * sense == 8: Level, low assertion
366 interrupts = <80 0x8>;
377 0x7000 0x0 0x0 0x1 &ipic 22 0x8
380 0x7800 0x0 0x0 0x1 &ipic 21 0x8
381 0x7800 0x0 0x0 0x2 &ipic 22 0x8
382 0x7800 0x0 0x0 0x4 &ipic 23 0x8
385 0xE000 0x0 0x0 0x1 &ipic 23 0x8
386 0xE000 0x0 0x0 0x2 &ipic 21 0x8
387 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
389 interrupts = <66 0x8>;
400 0xe0008300 0x8>; /* config space access registers */
416 interrupt-map = <0 0 0 1 &ipic 1 8
417 0 0 0 2 &ipic 1 8
418 0 0 0 3 &ipic 1 8
419 0 0 0 4 &ipic 1 8>;
448 interrupt-map = <0 0 0 1 &ipic 2 8
449 0 0 0 2 &ipic 2 8
450 0 0 0 3 &ipic 2 8
451 0 0 0 4 &ipic 2 8>;