Lines Matching +full:wdt +full:- +full:timer +full:- +full:index
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <16384>;
36 i-cache-size = <16384>;
37 timebase-frequency = <0>; // from bootloader
38 bus-frequency = <0>; // from bootloader
39 clock-frequency = <0>; // from bootloader
49 #address-cells = <2>;
50 #size-cells = <1>;
51 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
54 interrupt-parent = <&ipic>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 compatible = "cfi-flash";
69 bank-width = <2>;
70 device-width = <1>;
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "fsl,mpc8315-fcm-nand",
77 "fsl,elbc-fcm-nand";
80 u-boot@0 {
82 read-only;
95 #address-cells = <1>;
96 #size-cells = <1>;
98 compatible = "fsl,mpc8315-immr", "simple-bus";
101 bus-frequency = <0>;
103 wdt@200 {
110 #address-cells = <1>;
111 #size-cells = <0>;
112 cell-index = <0>;
113 compatible = "fsl-i2c";
116 interrupt-parent = <&ipic>;
124 #gpio-cells = <2>;
125 compatible = "fsl,mc9s08qg8-mpc8315erdb",
126 "fsl,mcu-mpc8349emitx";
128 gpio-controller;
133 cell-index = <0>;
137 interrupt-parent = <&ipic>;
142 #address-cells = <1>;
143 #size-cells = <1>;
144 compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
147 interrupt-parent = <&ipic>;
149 cell-index = <0>;
150 dma-channel@0 {
151 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
153 cell-index = <0>;
154 interrupt-parent = <&ipic>;
157 dma-channel@80 {
158 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
160 cell-index = <1>;
161 interrupt-parent = <&ipic>;
164 dma-channel@100 {
165 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
167 cell-index = <2>;
168 interrupt-parent = <&ipic>;
171 dma-channel@180 {
172 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
174 cell-index = <3>;
175 interrupt-parent = <&ipic>;
181 compatible = "fsl-usb2-dr";
183 #address-cells = <1>;
184 #size-cells = <0>;
185 interrupt-parent = <&ipic>;
191 #address-cells = <1>;
192 #size-cells = <1>;
193 cell-index = <0>;
199 local-mac-address = [ 00 00 00 00 00 00 ];
201 interrupt-parent = <&ipic>;
202 tbi-handle = <&tbi0>;
203 phy-handle = < &phy0 >;
204 fsl,magic-packet;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 compatible = "fsl,gianfar-mdio";
212 phy0: ethernet-phy@0 {
213 interrupt-parent = <&ipic>;
218 phy1: ethernet-phy@1 {
219 interrupt-parent = <&ipic>;
224 tbi0: tbi-phy@11 {
226 device_type = "tbi-phy";
232 #address-cells = <1>;
233 #size-cells = <1>;
234 cell-index = <1>;
240 local-mac-address = [ 00 00 00 00 00 00 ];
242 interrupt-parent = <&ipic>;
243 tbi-handle = <&tbi1>;
244 phy-handle = < &phy1 >;
245 fsl,magic-packet;
248 #address-cells = <1>;
249 #size-cells = <0>;
250 compatible = "fsl,gianfar-tbi";
253 tbi1: tbi-phy@11 {
255 device_type = "tbi-phy";
261 cell-index = <0>;
265 clock-frequency = <133333333>;
267 interrupt-parent = <&ipic>;
271 cell-index = <1>;
275 clock-frequency = <133333333>;
277 interrupt-parent = <&ipic>;
286 interrupt-parent = <&ipic>;
287 fsl,num-channels = <4>;
288 fsl,channel-fifo-len = <24>;
289 fsl,exec-units-mask = <0x97c>;
290 fsl,descriptor-types-mask = <0x3a30abf>;
294 compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
296 cell-index = <1>;
298 interrupt-parent = <&ipic>;
302 compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
304 cell-index = <2>;
306 interrupt-parent = <&ipic>;
309 gtm1: timer@500 {
310 compatible = "fsl,mpc8315-gtm", "fsl,gtm";
313 interrupt-parent = <&ipic>;
314 clock-frequency = <133333333>;
317 timer@600 {
318 compatible = "fsl,mpc8315-gtm", "fsl,gtm";
321 interrupt-parent = <&ipic>;
322 clock-frequency = <133333333>;
329 * sense == 2: Edge, high-to-low change
331 ipic: interrupt-controller@700 {
332 interrupt-controller;
333 #address-cells = <0>;
334 #interrupt-cells = <2>;
339 ipic-msi@7c0 {
340 compatible = "fsl,ipic-msi";
342 msi-available-ranges = <0 0x100>;
351 interrupt-parent = < &ipic >;
355 compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc",
356 "fsl,mpc8349-pmc";
359 interrupt-parent = <&ipic>;
360 fsl,mpc8313-wakeup-timer = <>m1>;
363 gpio: gpio-controller@c00 {
364 compatible = "fsl,mpc8314-gpio";
367 interrupt-parent = <&ipic>;
368 gpio-controller;
369 #gpio-cells = <2>;
374 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
375 interrupt-map = <
376 /* IDSEL 0x0E -mini PCI */
382 /* IDSEL 0x0F -mini PCI */
388 /* IDSEL 0x10 - PCI slot */
393 interrupt-parent = <&ipic>;
395 bus-range = <0x0 0x0>;
399 clock-frequency = <66666666>;
400 #interrupt-cells = <1>;
401 #size-cells = <2>;
402 #address-cells = <3>;
405 compatible = "fsl,mpc8349-pci";
410 #address-cells = <3>;
411 #size-cells = <2>;
412 #interrupt-cells = <1>;
414 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
418 bus-range = <0 255>;
419 interrupt-map-mask = <0xf800 0 0 7>;
420 interrupt-map = <0 0 0 1 &ipic 1 8
424 clock-frequency = <0>;
427 #address-cells = <3>;
428 #size-cells = <2>;
441 #address-cells = <3>;
442 #size-cells = <2>;
443 #interrupt-cells = <1>;
445 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
449 bus-range = <0 255>;
450 interrupt-map-mask = <0xf800 0 0 7>;
451 interrupt-map = <0 0 0 1 &ipic 2 8
455 clock-frequency = <0>;
458 #address-cells = <3>;
459 #size-cells = <2>;
472 compatible = "gpio-leds";
476 default-state = "on";
481 linux,default-trigger = "disk-activity";