Lines Matching +full:0 +full:x8
25 #size-cells = <0>;
27 PowerPC,8308@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; // from bootloader
42 reg = <0x00000000 0x08000000>; // 128MB at 0
49 reg = <0xe0005000 0x1000>;
50 interrupts = <77 0x8>;
53 ranges = <0x0 0x0 0xfc000000 0x04000000
54 0x1 0x0 0xfbff0000 0x00008000
55 0x2 0x0 0xfbff8000 0x00008000>;
57 flash@0,0 {
61 reg = <0x0 0x0 0x4000000>;
65 u-boot@0 {
66 reg = <0x0 0x60000>;
70 reg = <0x60000 0x20000>;
73 reg = <0x80000 0x20000>;
76 reg = <0xa0000 0x200000>;
79 reg = <0x2a0000 0x20000>;
82 reg = <0x2c0000 0x640000>;
85 reg = <0x700000 0x3900000>;
89 can@1,0 {
91 reg = <0x1 0x0 0x80>;
92 interrupts = <18 0x8>;
96 cpld@2,0 {
98 reg = <0x2 0x0 0x8>;
99 interrupts = <48 0x8>;
109 ranges = <0 0xe0000000 0x00100000>;
110 reg = <0xe0000000 0x00000200>;
111 bus-frequency = <0>;
115 #size-cells = <0>;
117 reg = <0x3000 0x100>;
118 interrupts = <14 0x8>;
123 reg = <0x50>;
129 #size-cells = <0>;
131 reg = <0x3100 0x100>;
132 interrupts = <15 0x8>;
137 reg = <0x28>;
141 reg = <0x48>;
145 reg = <0x49>;
149 reg = <0x4b>;
155 reg = <0x23000 0x1000>;
157 #size-cells = <0>;
159 interrupts = <38 0x8>;
167 ranges = <0x0 0x24000 0x1000>;
169 cell-index = <0>;
173 reg = <0x24000 0x1000>;
175 interrupts = <32 0x8 33 0x8 34 0x8>;
181 #size-cells = <0>;
183 reg = <0x520 0x20>;
186 interrupts = <17 0x8>;
187 reg = <0x1>;
191 interrupts = <19 0x8>;
192 reg = <0x2>;
195 reg = <0x11>;
208 reg = <0x25000 0x1000>;
209 ranges = <0x0 0x25000 0x1000>;
211 interrupts = <35 0x8 36 0x8 37 0x8>;
217 #size-cells = <0>;
219 reg = <0x520 0x20>;
221 reg = <0x11>;
228 cell-index = <0>;
231 reg = <0x4500 0x100>;
233 interrupts = <9 0x8>;
241 reg = <0x4600 0x100>;
243 interrupts = <10 0x8>;
250 reg = <0xc00 0x18>;
251 interrupts = <74 0x8>;
258 reg = <0x500 0x100>;
273 #address-cells = <0>;
275 reg = <0x700 0x100>;
281 reg = <0x7c0 0x40>;
282 msi-available-ranges = <0x0 0x100>;
283 interrupts = < 0x43 0x8
284 0x4 0x8
285 0x51 0x8
286 0x52 0x8
287 0x56 0x8
288 0x57 0x8
289 0x58 0x8
290 0x59 0x8 >;
296 reg = <0x2c000 0x1800>;
297 interrupts = <3 0x8
298 94 0x8>;
310 reg = <0xe0009000 0x00001000
311 0xb0000000 0x01000000>;
312 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
313 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
314 bus-range = <0 0>;
315 interrupt-map-mask = <0 0 0 0>;
316 interrupt-map = <0 0 0 0 &ipic 1 8>;
317 interrupts = <0x1 0x8>;
319 clock-frequency = <0>;
321 pcie@0 {
325 reg = <0 0 0 0 0>;
326 ranges = <0x02000000 0 0xa0000000
327 0x02000000 0 0xa0000000
328 0 0x10000000
329 0x01000000 0 0x00000000
330 0x01000000 0 0x00000000
331 0 0x00800000>;