Lines Matching +full:mpc5121 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * base MPC5121 Device Tree Source
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
13 model = "mpc5121";
14 compatible = "fsl,mpc5121";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&ipic>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; /* 32 bytes */
32 i-cache-line-size = <0x20>; /* 32 bytes */
33 d-cache-size = <0x8000>; /* L1, 32K */
34 i-cache-size = <0x8000>; /* L1, 32K */
35 timebase-frequency = <49500000>;/* 49.5 MHz (csb/4) */
36 bus-frequency = <198000000>; /* 198 MHz csb bus */
37 clock-frequency = <396000000>; /* 396 MHz ppc core */
47 compatible = "fsl,mpc5121-mbx";
53 clock-names = "mbx-bus", "mbx-3d", "mbx";
57 compatible = "fsl,mpc5121-sram";
62 compatible = "fsl,mpc5121-nfc";
65 #address-cells = <1>;
66 #size-cells = <1>;
68 clock-names = "ipg";
72 compatible = "fsl,mpc5121-localbus";
73 #address-cells = <2>;
74 #size-cells = <1>;
80 #address-cells = <1>;
81 #size-cells = <0>;
84 compatible = "fixed-clock";
85 #clock-cells = <0>;
86 clock-frequency = <33000000>;
91 compatible = "fsl,mpc5121-immr";
92 #address-cells = <1>;
93 #size-cells = <1>;
96 bus-frequency = <66000000>; /* 66 MHz ips bus */
104 * sense == 2: Edge, high-to-low change
106 ipic: interrupt-controller@c00 {
107 compatible = "fsl,mpc5121-ipic", "fsl,ipic";
108 interrupt-controller;
109 #address-cells = <0>;
110 #interrupt-cells = <2>;
116 compatible = "fsl,mpc5121-wdt";
122 compatible = "fsl,mpc5121-rtc";
129 compatible = "fsl,mpc5121-reset";
135 compatible = "fsl,mpc5121-clock";
137 #clock-cells = <1>;
139 clock-names = "osc";
144 compatible = "fsl,mpc5121-pmc";
150 compatible = "fsl,mpc5121-gpio";
156 compatible = "fsl,mpc5121-mscan";
164 clock-names = "ipg", "ips", "sys", "ref", "mclk";
168 compatible = "fsl,mpc5121-mscan";
176 clock-names = "ipg", "ips", "sys", "ref", "mclk";
180 compatible = "fsl,mpc5121-sdhc";
184 dma-names = "rx-tx";
187 clock-names = "ipg", "per";
190 i2c@1700 {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
197 clock-names = "ipg";
200 i2c@1720 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
207 clock-names = "ipg";
210 i2c@1740 {
211 #address-cells = <1>;
212 #size-cells = <0>;
213 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
217 clock-names = "ipg";
221 compatible = "fsl,mpc5121-i2c-ctrl";
226 compatible = "fsl,mpc5121-axe";
230 clock-names = "ipg";
234 compatible = "fsl,mpc5121-diu";
238 clock-names = "ipg";
242 compatible = "fsl,mpc5121-mscan";
250 clock-names = "ipg", "ips", "sys", "ref", "mclk";
254 compatible = "fsl,mpc5121-mscan";
262 clock-names = "ipg", "ips", "sys", "ref", "mclk";
266 compatible = "fsl,mpc5121-viu";
270 clock-names = "ipg";
274 compatible = "fsl,mpc5121-fec-mdio";
276 #address-cells = <1>;
277 #size-cells = <0>;
279 clock-names = "per";
284 compatible = "fsl,mpc5121-fec";
286 local-mac-address = [ 00 00 00 00 00 00 ];
289 clock-names = "per";
294 compatible = "fsl,mpc5121-usb2-dr";
296 #address-cells = <1>;
297 #size-cells = <0>;
302 clock-names = "ipg";
307 compatible = "fsl,mpc5121-usb2-dr";
309 #address-cells = <1>;
310 #size-cells = <0>;
315 clock-names = "ipg";
320 compatible = "fsl,mpc5121-ioctl";
326 compatible = "fsl,mpc5121-lpc";
331 compatible = "fsl,mpc512x-lpbfifo";
335 dma-names = "rx-tx";
339 compatible = "fsl,mpc5121-pata";
343 clock-names = "ipg";
350 compatible = "fsl,mpc5121-psc";
353 fsl,rx-fifo-size = <16>;
354 fsl,tx-fifo-size = <16>;
357 clock-names = "ipg", "mclk";
362 compatible = "fsl,mpc5121-psc";
365 fsl,rx-fifo-size = <16>;
366 fsl,tx-fifo-size = <16>;
369 clock-names = "ipg", "mclk";
374 compatible = "fsl,mpc5121-psc";
377 fsl,rx-fifo-size = <16>;
378 fsl,tx-fifo-size = <16>;
381 clock-names = "ipg", "mclk";
386 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
389 fsl,rx-fifo-size = <16>;
390 fsl,tx-fifo-size = <16>;
393 clock-names = "ipg", "mclk";
398 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
401 fsl,rx-fifo-size = <16>;
402 fsl,tx-fifo-size = <16>;
405 clock-names = "ipg", "mclk";
410 compatible = "fsl,mpc5121-psc";
413 fsl,rx-fifo-size = <16>;
414 fsl,tx-fifo-size = <16>;
417 clock-names = "ipg", "mclk";
422 compatible = "fsl,mpc5121-psc";
425 fsl,rx-fifo-size = <16>;
426 fsl,tx-fifo-size = <16>;
429 clock-names = "ipg", "mclk";
434 compatible = "fsl,mpc5121-psc";
437 fsl,rx-fifo-size = <16>;
438 fsl,tx-fifo-size = <16>;
441 clock-names = "ipg", "mclk";
446 compatible = "fsl,mpc5121-psc";
449 fsl,rx-fifo-size = <16>;
450 fsl,tx-fifo-size = <16>;
453 clock-names = "ipg", "mclk";
458 compatible = "fsl,mpc5121-psc";
461 fsl,rx-fifo-size = <16>;
462 fsl,tx-fifo-size = <16>;
465 clock-names = "ipg", "mclk";
470 compatible = "fsl,mpc5121-psc";
473 fsl,rx-fifo-size = <16>;
474 fsl,tx-fifo-size = <16>;
477 clock-names = "ipg", "mclk";
482 compatible = "fsl,mpc5121-psc";
485 fsl,rx-fifo-size = <16>;
486 fsl,tx-fifo-size = <16>;
489 clock-names = "ipg", "mclk";
493 compatible = "fsl,mpc5121-psc-fifo";
497 clock-names = "ipg";
501 compatible = "fsl,mpc5121-dma";
504 #dma-cells = <1>;
509 compatible = "fsl,mpc5121-pci";
512 clock-frequency = <0>;
513 #address-cells = <3>;
514 #size-cells = <2>;
515 #interrupt-cells = <1>;
517 clock-names = "ipg";
521 bus-range = <0x0 0x0>;