Lines Matching +full:serial +full:- +full:shift +full:- +full:bits
1 /dts-v1/;
2 #include <dt-bindings/gpio/gpio.h>
5 #size-cells = <0x02>;
6 #address-cells = <0x02>;
7 model-name = "microwatt";
8 compatible = "microwatt-soc";
15 reserved-memory {
16 #size-cells = <0x02>;
17 #address-cells = <0x02>;
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
30 clock-frequency = <100000000>;
35 #size-cells = <0x00>;
36 #address-cells = <0x01>;
38 ibm,powerpc-cpu-features {
39 display-name = "Microwatt";
41 device_type = "cpu-features";
42 compatible = "ibm,powerpc-cpu-features";
44 mmu-radix {
46 usable-privilege = <6>;
47 os-support = <0>;
50 little-endian {
52 usable-privilege = <7>;
53 os-support = <0>;
54 hwcap-bit-nr = <1>;
57 cache-inhibited-large-page {
59 usable-privilege = <6>;
60 os-support = <0>;
63 fixed-point-v3 {
65 usable-privilege = <7>;
68 no-execute {
70 usable-privilege = <2>;
71 os-support = <0>;
74 floating-point {
75 hfscr-bit-nr = <0>;
76 hwcap-bit-nr = <27>;
78 usable-privilege = <7>;
79 hv-support = <1>;
80 os-support = <0>;
83 prefixed-instructions {
84 hfscr-bit-nr = <13>;
85 fscr-bit-nr = <13>;
87 usable-privilege = <7>;
88 os-support = <1>;
89 hv-support = <1>;
93 hfscr-bit-nr = <8>;
94 fscr-bit-nr = <8>;
96 usable-privilege = <7>;
97 os-support = <1>;
98 hv-support = <1>;
99 hwcap-bit-nr = <58>;
102 control-register {
104 usable-privilege = <7>;
107 system-call-vectored {
109 usable-privilege = <7>;
110 os-support = <1>;
111 fscr-bit-nr = <12>;
112 hwcap-bit-nr = <52>;
117 i-cache-sets = <2>;
118 ibm,dec-bits = <64>;
119 reservation-granule-size = <64>;
120 clock-frequency = <100000000>;
121 timebase-frequency = <100000000>;
122 i-tlb-sets = <1>;
123 ibm,ppc-interrupt-server#s = <0>;
124 i-cache-block-size = <64>;
125 d-cache-block-size = <64>;
126 d-cache-sets = <2>;
127 i-tlb-size = <64>;
128 cpu-version = <0x990000>;
130 i-cache-size = <0x1000>;
131 ibm,processor-radix-AP-encodings = <0x0c 0xa0000010 0x20000015 0x4000001e>;
132 tlb-size = <0>;
133 tlb-sets = <0>;
135 d-tlb-size = <128>;
136 d-tlb-sets = <2>;
138 general-purpose;
139 64-bit;
140 d-cache-size = <0x1000>;
141 ibm,chip-id = <0>;
142 ibm,mmu-lpid-bits = <12>;
143 ibm,mmu-pid-bits = <20>;
147 i-cache-sets = <2>;
148 ibm,dec-bits = <64>;
149 reservation-granule-size = <64>;
150 clock-frequency = <100000000>;
151 timebase-frequency = <100000000>;
152 i-tlb-sets = <1>;
153 ibm,ppc-interrupt-server#s = <1>;
154 i-cache-block-size = <64>;
155 d-cache-block-size = <64>;
156 d-cache-sets = <2>;
157 i-tlb-size = <64>;
158 cpu-version = <0x990000>;
160 i-cache-size = <0x1000>;
161 ibm,processor-radix-AP-encodings = <0x0c 0xa0000010 0x20000015 0x4000001e>;
162 tlb-size = <0>;
163 tlb-sets = <0>;
165 d-tlb-size = <128>;
166 d-tlb-sets = <2>;
168 general-purpose;
169 64-bit;
170 d-cache-size = <0x1000>;
171 ibm,chip-id = <0>;
172 ibm,mmu-lpid-bits = <12>;
173 ibm,mmu-pid-bits = <20>;
178 compatible = "simple-bus";
179 #address-cells = <1>;
180 #size-cells = <1>;
181 interrupt-parent = <&ICS>;
185 interrupt-controller@4000 {
186 compatible = "openpower,xics-presentation", "ibm,ppc-xicp";
187 ibm,interrupt-server-ranges = <0x0 0x2>;
191 ICS: interrupt-controller@5000 {
192 compatible = "openpower,xics-sources";
193 interrupt-controller;
194 interrupt-ranges = <0x10 0x10>;
196 #address-cells = <0>;
197 #size-cells = <0>;
198 #interrupt-cells = <2>;
201 UART0: serial@2000 {
202 device_type = "serial";
205 clock-frequency = <100000000>;
206 current-speed = <115200>;
207 reg-shift = <2>;
208 fifo-size = <16>;
215 gpio-controller;
216 #gpio-cells = <2>;
219 interrupt-controller;
220 #interrupt-cells = <2>;
228 reg-names = "mac", "mido", "buffer";
229 litex,rx-slots = <2>;
230 litex,tx-slots = <2>;
231 litex,slot-size = <0x800>;
242 reg-names = "phy", "core", "reader", "writer", "irq";
243 bus-width = <4>;
251 ibm,architecture-vec-5 = [19 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00
253 stdout-path = &UART0;