Lines Matching +full:timebase +full:- +full:frequency
1 // SPDX-License-Identifier: GPL-2.0-or-later
12 &gpt0 { fsl,has-wdt; };
24 stdout-path = &console;
29 timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
30 bus-frequency = <132000000>; // 132 MHz
31 clock-frequency = <396000000>; // 396 MHz
40 bus-frequency = <132000000>;// 132 MHz
64 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
68 phy-handle = <&phy0>;
72 phy0: ethernet-phy@0 {
83 interrupt-map-mask = <0xf800 0 0 7>;
84 interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
102 interrupt-parent = <&mpc5200_pic>;
111 compatible = "amd,am29lv28ml", "cfi-flash";
113 bank-width = <4>; // Width in bytes of the flash bank
114 device-width = <2>; // Two devices on each bank
118 compatible = "amd,am29lv28ml", "cfi-flash";
120 bank-width = <4>; // Width in bytes of the flash bank
121 device-width = <2>; // Two devices on each bank
125 compatible = "fsl,media5200-fpga";
126 interrupt-controller;
127 #interrupt-cells = <2>; // 0:bank 1:id; no type field
130 interrupt-parent = <&mpc5200_pic>;
138 interrupt-parent = <&media5200_fpga>;