Lines Matching +full:general +full:- +full:purpose
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2006-2007 Secret Lab Technologies Ltd.
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
16 interrupt-parent = <&mpc5200_pic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
25 d-cache-line-size = <32>;
26 i-cache-line-size = <32>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "fsl,mpc5200-immr";
46 bus-frequency = <0>; // from bootloader
47 system-frequency = <0>; // from bootloader
50 compatible = "fsl,mpc5200-cdm";
54 mpc5200_pic: interrupt-controller@500 {
56 interrupt-controller;
57 #interrupt-cells = <3>;
58 compatible = "fsl,mpc5200-pic";
62 timer@600 { // General Purpose Timer
63 compatible = "fsl,mpc5200-gpt";
66 fsl,has-wdt;
69 timer@610 { // General Purpose Timer
70 compatible = "fsl,mpc5200-gpt";
75 timer@620 { // General Purpose Timer
76 compatible = "fsl,mpc5200-gpt";
81 timer@630 { // General Purpose Timer
82 compatible = "fsl,mpc5200-gpt";
87 timer@640 { // General Purpose Timer
88 compatible = "fsl,mpc5200-gpt";
93 timer@650 { // General Purpose Timer
94 compatible = "fsl,mpc5200-gpt";
99 timer@660 { // General Purpose Timer
100 compatible = "fsl,mpc5200-gpt";
105 timer@670 { // General Purpose Timer
106 compatible = "fsl,mpc5200-gpt";
112 compatible = "fsl,mpc5200-rtc";
118 compatible = "fsl,mpc5200-mscan";
124 compatible = "fsl,mpc5200-mscan";
130 compatible = "fsl,mpc5200-gpio";
133 gpio-controller;
134 #gpio-cells = <2>;
138 compatible = "fsl,mpc5200-gpio-wkup";
141 gpio-controller;
142 #gpio-cells = <2>;
146 compatible = "fsl,mpc5200-spi";
152 compatible = "fsl,mpc5200-ohci","ohci-be";
157 dma-controller@1200 {
158 compatible = "fsl,mpc5200-bestcomm";
167 compatible = "fsl,mpc5200-xlb";
172 compatible = "fsl,mpc5200-psc-uart";
173 cell-index = <0>;
180 // compatible = "fsl,mpc5200-psc-ac97";
181 // cell-index = <1>;
188 // compatible = "fsl,mpc5200-psc-i2s";
189 // cell-index = <2>;
196 // compatible = "fsl,mpc5200-psc-uart";
197 // cell-index = <3>;
204 // compatible = "fsl,mpc5200-psc-uart";
205 // cell-index = <4>;
212 // compatible = "fsl,mpc5200-psc-spi";
213 // cell-index = <5>;
219 compatible = "fsl,mpc5200-fec";
221 local-mac-address = [ 00 00 00 00 00 00 ];
223 phy-handle = <&phy0>;
227 #address-cells = <1>;
228 #size-cells = <0>;
229 compatible = "fsl,mpc5200-mdio";
233 phy0: ethernet-phy@0 {
239 compatible = "fsl,mpc5200-ata";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "fsl,mpc5200-i2c","fsl-i2c";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,mpc5200-i2c","fsl-i2c";
266 compatible = "fsl,mpc5200-sram";
272 #interrupt-cells = <1>;
273 #size-cells = <2>;
274 #address-cells = <3>;
276 compatible = "fsl,mpc5200-pci";
278 interrupt-map-mask = <0xf800 0 0 7>;
279 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
283 clock-frequency = <0>; // From boot loader
285 bus-range = <0 0>;
292 compatible = "fsl,mpc5200-lpb","simple-bus";
293 #address-cells = <2>;
294 #size-cells = <1>;
299 compatible = "amd,am29lv652d", "cfi-flash";
301 bank-width = <1>;