Lines Matching +full:0 +full:x129000
37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
71 interrupts = <20 2 0 0>;
72 interrupt-map-mask = <0xf800 0 0 7>;
74 /* IDSEL 0x0 */
75 0000 0 0 1 &mpic 40 1 0 0
76 0000 0 0 2 &mpic 1 1 0 0
77 0000 0 0 3 &mpic 2 1 0 0
78 0000 0 0 4 &mpic 3 1 0 0
83 /* controller at 0x250000 */
85 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
89 bus-range = <0 0xff>;
90 interrupts = <21 2 0 0>;
91 pcie@0 {
96 reg = <0 0 0 0 0>;
97 interrupts = <21 2 0 0>;
98 interrupt-map-mask = <0xf800 0 0 7>;
100 /* IDSEL 0x0 */
101 0000 0 0 1 &mpic 41 1 0 0
102 0000 0 0 2 &mpic 5 1 0 0
103 0000 0 0 3 &mpic 6 1 0 0
104 0000 0 0 4 &mpic 7 1 0 0
109 /* controller at 0x260000 */
111 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
115 bus-range = <0x0 0xff>;
116 interrupts = <22 2 0 0>;
117 pcie@0 {
122 reg = <0 0 0 0 0>;
123 interrupts = <22 2 0 0>;
124 interrupt-map-mask = <0xf800 0 0 7>;
126 /* IDSEL 0x0 */
127 0000 0 0 1 &mpic 42 1 0 0
128 0000 0 0 2 &mpic 9 1 0 0
129 0000 0 0 3 &mpic 10 1 0 0
130 0000 0 0 4 &mpic 11 1 0 0
135 /* controller at 0x270000 */
137 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
141 bus-range = <0x0 0xff>;
142 interrupts = <23 2 0 0>;
143 pcie@0 {
148 reg = <0 0 0 0 0>;
149 interrupts = <23 2 0 0>;
150 interrupt-map-mask = <0xf800 0 0 7>;
152 /* IDSEL 0x0 */
153 0000 0 0 1 &mpic 43 1 0 0
154 0000 0 0 2 &mpic 0 1 0 0
155 0000 0 0 3 &mpic 4 1 0 0
156 0000 0 0 4 &mpic 8 1 0 0
186 dcsr-epu@0 {
188 interrupts = <52 2 0 0
189 84 2 0 0
190 85 2 0 0
191 94 2 0 0
192 95 2 0 0>;
193 reg = <0x0 0x1000>;
197 reg = <0x1000 0x1000 0x1002000 0x10000>;
201 reg = <0x2000 0x1000>;
205 reg = <0x8000 0x1000 0x1A000 0x1000>;
209 reg = <0x9000 0x1000>;
213 reg = <0x11000 0x1000>;
218 reg = <0x12000 0x1000>;
223 reg = <0x13000 0x1000>;
228 reg = <0x14000 0x1000>;
232 reg = <0x18000 0x1000>;
236 reg = <0x22000 0x1000>;
240 reg = <0x30000 0x1000 0x1022000 0x10000>;
244 reg = <0x31000 0x1000 0x1042000 0x10000>;
248 reg = <0x32000 0x1000 0x1062000 0x10000>;
253 reg = <0x100000 0x1000 0x101000 0x1000>;
258 reg = <0x108000 0x1000 0x109000 0x1000>;
263 reg = <0x110000 0x1000 0x111000 0x1000>;
268 reg = <0x118000 0x1000 0x119000 0x1000>;
273 reg = <0x120000 0x1000 0x121000 0x1000>;
278 reg = <0x128000 0x1000 0x129000 0x1000>;
283 reg = <0x130000 0x1000 0x131000 0x1000>;
288 reg = <0x138000 0x1000 0x139000 0x1000>;
293 reg = <0x140000 0x1000 0x141000 0x1000>;
298 reg = <0x148000 0x1000 0x149000 0x1000>;
303 reg = <0x150000 0x1000 0x151000 0x1000>;
308 reg = <0x158000 0x1000 0x159000 0x1000>;
313 #address-cells = <0x1>;
314 #size-cells = <0x1>;
317 bman-portal@0 {
319 reg = <0x0 0x4000>, <0x1000000 0x1000>;
320 interrupts = <105 2 0 0>;
324 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
325 interrupts = <107 2 0 0>;
329 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
330 interrupts = <109 2 0 0>;
334 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
335 interrupts = <111 2 0 0>;
339 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
340 interrupts = <113 2 0 0>;
344 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
345 interrupts = <115 2 0 0>;
349 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
350 interrupts = <117 2 0 0>;
354 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
355 interrupts = <119 2 0 0>;
359 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
360 interrupts = <121 2 0 0>;
364 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
365 interrupts = <123 2 0 0>;
369 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
370 interrupts = <125 2 0 0>;
374 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
375 interrupts = <127 2 0 0>;
379 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
380 interrupts = <129 2 0 0>;
384 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
385 interrupts = <131 2 0 0>;
389 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
390 interrupts = <133 2 0 0>;
394 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
395 interrupts = <135 2 0 0>;
399 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
400 interrupts = <137 2 0 0>;
404 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
405 interrupts = <139 2 0 0>;
409 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
410 interrupts = <141 2 0 0>;
414 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
415 interrupts = <143 2 0 0>;
419 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
420 interrupts = <145 2 0 0>;
424 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
425 interrupts = <147 2 0 0>;
429 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
430 interrupts = <149 2 0 0>;
434 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
435 interrupts = <151 2 0 0>;
439 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
440 interrupts = <153 2 0 0>;
444 reg = <0x64000 0x4000>, <0x1019000 0x1000>;
445 interrupts = <155 2 0 0>;
449 reg = <0x68000 0x4000>, <0x101a000 0x1000>;
450 interrupts = <157 2 0 0>;
454 reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
455 interrupts = <159 2 0 0>;
459 reg = <0x70000 0x4000>, <0x101c000 0x1000>;
460 interrupts = <161 2 0 0>;
464 reg = <0x74000 0x4000>, <0x101d000 0x1000>;
465 interrupts = <163 2 0 0>;
469 reg = <0x78000 0x4000>, <0x101e000 0x1000>;
470 interrupts = <165 2 0 0>;
474 reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
475 interrupts = <167 2 0 0>;
479 reg = <0x80000 0x4000>, <0x1020000 0x1000>;
480 interrupts = <169 2 0 0>;
484 reg = <0x84000 0x4000>, <0x1021000 0x1000>;
485 interrupts = <171 2 0 0>;
489 reg = <0x88000 0x4000>, <0x1022000 0x1000>;
490 interrupts = <173 2 0 0>;
494 reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
495 interrupts = <175 2 0 0>;
499 reg = <0x90000 0x4000>, <0x1024000 0x1000>;
500 interrupts = <385 2 0 0>;
504 reg = <0x94000 0x4000>, <0x1025000 0x1000>;
505 interrupts = <387 2 0 0>;
509 reg = <0x98000 0x4000>, <0x1026000 0x1000>;
510 interrupts = <389 2 0 0>;
514 reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
515 interrupts = <391 2 0 0>;
519 reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
520 interrupts = <393 2 0 0>;
524 reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
525 interrupts = <395 2 0 0>;
529 reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
530 interrupts = <397 2 0 0>;
534 reg = <0xac000 0x4000>, <0x102b000 0x1000>;
535 interrupts = <399 2 0 0>;
539 reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
540 interrupts = <401 2 0 0>;
544 reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
545 interrupts = <403 2 0 0>;
549 reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
550 interrupts = <405 2 0 0>;
554 reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
555 interrupts = <407 2 0 0>;
559 reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
560 interrupts = <409 2 0 0>;
564 reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
565 interrupts = <411 2 0 0>;
570 #address-cells = <0x1>;
571 #size-cells = <0x1>;
574 qportal0: qman-portal@0 {
576 reg = <0x0 0x4000>, <0x1000000 0x1000>;
577 interrupts = <104 0x2 0 0>;
578 cell-index = <0x0>;
582 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
583 interrupts = <106 0x2 0 0>;
584 cell-index = <0x1>;
588 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
589 interrupts = <108 0x2 0 0>;
590 cell-index = <0x2>;
594 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
595 interrupts = <110 0x2 0 0>;
596 cell-index = <0x3>;
600 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
601 interrupts = <112 0x2 0 0>;
602 cell-index = <0x4>;
606 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
607 interrupts = <114 0x2 0 0>;
608 cell-index = <0x5>;
612 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
613 interrupts = <116 0x2 0 0>;
614 cell-index = <0x6>;
618 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
619 interrupts = <118 0x2 0 0>;
620 cell-index = <0x7>;
624 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
625 interrupts = <120 0x2 0 0>;
626 cell-index = <0x8>;
630 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
631 interrupts = <122 0x2 0 0>;
632 cell-index = <0x9>;
636 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
637 interrupts = <124 0x2 0 0>;
638 cell-index = <0xa>;
642 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
643 interrupts = <126 0x2 0 0>;
644 cell-index = <0xb>;
648 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
649 interrupts = <128 0x2 0 0>;
650 cell-index = <0xc>;
654 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
655 interrupts = <130 0x2 0 0>;
656 cell-index = <0xd>;
660 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
661 interrupts = <132 0x2 0 0>;
662 cell-index = <0xe>;
666 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
667 interrupts = <134 0x2 0 0>;
668 cell-index = <0xf>;
672 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
673 interrupts = <136 0x2 0 0>;
674 cell-index = <0x10>;
678 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
679 interrupts = <138 0x2 0 0>;
680 cell-index = <0x11>;
684 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
685 interrupts = <140 0x2 0 0>;
686 cell-index = <0x12>;
690 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
691 interrupts = <142 0x2 0 0>;
692 cell-index = <0x13>;
696 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
697 interrupts = <144 0x2 0 0>;
698 cell-index = <0x14>;
702 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
703 interrupts = <146 0x2 0 0>;
704 cell-index = <0x15>;
708 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
709 interrupts = <148 0x2 0 0>;
710 cell-index = <0x16>;
714 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
715 interrupts = <150 0x2 0 0>;
716 cell-index = <0x17>;
720 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
721 interrupts = <152 0x2 0 0>;
722 cell-index = <0x18>;
726 reg = <0x64000 0x4000>, <0x1019000 0x1000>;
727 interrupts = <154 0x2 0 0>;
728 cell-index = <0x19>;
732 reg = <0x68000 0x4000>, <0x101a000 0x1000>;
733 interrupts = <156 0x2 0 0>;
734 cell-index = <0x1a>;
738 reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
739 interrupts = <158 0x2 0 0>;
740 cell-index = <0x1b>;
744 reg = <0x70000 0x4000>, <0x101c000 0x1000>;
745 interrupts = <160 0x2 0 0>;
746 cell-index = <0x1c>;
750 reg = <0x74000 0x4000>, <0x101d000 0x1000>;
751 interrupts = <162 0x2 0 0>;
752 cell-index = <0x1d>;
756 reg = <0x78000 0x4000>, <0x101e000 0x1000>;
757 interrupts = <164 0x2 0 0>;
758 cell-index = <0x1e>;
762 reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
763 interrupts = <166 0x2 0 0>;
764 cell-index = <0x1f>;
768 reg = <0x80000 0x4000>, <0x1020000 0x1000>;
769 interrupts = <168 0x2 0 0>;
770 cell-index = <0x20>;
774 reg = <0x84000 0x4000>, <0x1021000 0x1000>;
775 interrupts = <170 0x2 0 0>;
776 cell-index = <0x21>;
780 reg = <0x88000 0x4000>, <0x1022000 0x1000>;
781 interrupts = <172 0x2 0 0>;
782 cell-index = <0x22>;
786 reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
787 interrupts = <174 0x2 0 0>;
788 cell-index = <0x23>;
792 reg = <0x90000 0x4000>, <0x1024000 0x1000>;
793 interrupts = <384 0x2 0 0>;
794 cell-index = <0x24>;
798 reg = <0x94000 0x4000>, <0x1025000 0x1000>;
799 interrupts = <386 0x2 0 0>;
800 cell-index = <0x25>;
804 reg = <0x98000 0x4000>, <0x1026000 0x1000>;
805 interrupts = <388 0x2 0 0>;
806 cell-index = <0x26>;
810 reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
811 interrupts = <390 0x2 0 0>;
812 cell-index = <0x27>;
816 reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
817 interrupts = <392 0x2 0 0>;
818 cell-index = <0x28>;
822 reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
823 interrupts = <394 0x2 0 0>;
824 cell-index = <0x29>;
828 reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
829 interrupts = <396 0x2 0 0>;
830 cell-index = <0x2a>;
834 reg = <0xac000 0x4000>, <0x102b000 0x1000>;
835 interrupts = <398 0x2 0 0>;
836 cell-index = <0x2b>;
840 reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
841 interrupts = <400 0x2 0 0>;
842 cell-index = <0x2c>;
846 reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
847 interrupts = <402 0x2 0 0>;
848 cell-index = <0x2d>;
852 reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
853 interrupts = <404 0x2 0 0>;
854 cell-index = <0x2e>;
858 reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
859 interrupts = <406 0x2 0 0>;
860 cell-index = <0x2f>;
864 reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
865 interrupts = <408 0x2 0 0>;
866 cell-index = <0x30>;
870 reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
871 interrupts = <410 0x2 0 0>;
872 cell-index = <0x31>;
887 corenet-law@0 {
889 reg = <0x0 0x1000>;
896 reg = <0x8000 0x1000>;
903 reg = <0x9000 0x1000>;
910 reg = <0xa000 0x1000>;
916 reg = <0x10000 0x1000
917 0x11000 0x1000
918 0x12000 0x1000>;
926 reg = <0x18000 0x1000>;
933 compatible = "fsl,pamu-v1.0", "fsl,pamu";
934 reg = <0x20000 0x6000>;
935 fsl,portid-mapping = <0x8000>;
937 24 2 0 0
945 reg = <0xe0000 0xe00>;
957 reg = <0xe2000 0x1000>;
962 reg = <0xe8000 0x1000>;
967 reg = <0xea000 0x4000>;
970 /include/ "elo3-dma-0.dtsi"
974 /include/ "qoriq-espi-0.dtsi"
979 /include/ "qoriq-esdhc-0.dtsi"
984 /include/ "qoriq-i2c-0.dtsi"
986 /include/ "qoriq-duart-0.dtsi"
988 /include/ "qoriq-gpio-0.dtsi"
992 /include/ "qoriq-usb2-mph-0.dtsi"
998 /include/ "qoriq-usb2-dr-0.dtsi"
1004 /include/ "qoriq-sata2-0.dtsi"
1006 /include/ "qoriq-sec5.0-0.dtsi"
1010 /include/ "qoriq-fman3-0.dtsi"
1011 /include/ "qoriq-fman3-0-1g-0.dtsi"
1012 /include/ "qoriq-fman3-0-1g-1.dtsi"
1013 /include/ "qoriq-fman3-0-1g-2.dtsi"
1014 /include/ "qoriq-fman3-0-1g-3.dtsi"
1015 /include/ "qoriq-fman3-0-1g-4.dtsi"
1016 /include/ "qoriq-fman3-0-1g-5.dtsi"
1017 /include/ "qoriq-fman3-0-10g-0.dtsi"
1018 /include/ "qoriq-fman3-0-10g-1.dtsi"
1054 /include/ "qoriq-fman3-1-1g-0.dtsi"
1060 /include/ "qoriq-fman3-1-10g-0.dtsi"
1088 interrupts = <100 1 0 0>;
1092 interrupts = <101 1 0 0>;
1098 reg = <0xc20000 0x40000>;
1103 reg = <0xc60000 0x40000>;
1108 reg = <0xca0000 0x40000>;