Lines Matching +full:0 +full:xf
48 size = <0 0x1000000>;
49 alignment = <0 0x1000000>;
52 size = <0 0x400000>;
53 alignment = <0 0x400000>;
56 size = <0 0x2000000>;
57 alignment = <0 0x2000000>;
62 reg = <0xf 0xfe124000 0 0x2000>;
63 ranges = <0 0 0xf 0xe8000000 0x08000000
64 2 0 0xf 0xff800000 0x00010000
65 3 0 0xf 0xffdf0000 0x00008000>;
67 nor@0,0 {
71 reg = <0x0 0x0 0x8000000>;
76 nand@2,0 {
80 reg = <0x2 0x0 0x10000>;
83 cpld@3,0 {
84 reg = <3 0 0x300>;
93 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
97 ranges = <0x0 0xf 0xf4000000 0x2000000>;
101 ranges = <0x0 0xf 0xf6000000 0x2000000>;
105 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
106 reg = <0xf 0xfe000000 0 0x00001000>;
109 flash@0 {
113 reg = <0>;
126 reg = <0x4c>;
133 reg = <0x77>;
135 #size-cells = <0>;
152 reg = <0x03>;
156 reg = <0x01>;
160 reg = <0x02>;
167 reg = <0xf 0xfe240000 0 0x10000>;
168 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x10000000
169 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
170 pcie@0 {
171 ranges = <0x02000000 0 0xe0000000
172 0x02000000 0 0xe0000000
173 0 0x10000000
175 0x01000000 0 0x00000000
176 0x01000000 0 0x00000000
177 0 0x00010000>;
182 reg = <0xf 0xfe250000 0 0x10000>;
183 ranges = <0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
184 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
185 pcie@0 {
186 ranges = <0x02000000 0 0xe0000000
187 0x02000000 0 0xe0000000
188 0 0x10000000
190 0x01000000 0 0x00000000
191 0x01000000 0 0x00000000
192 0 0x00010000>;
197 reg = <0xf 0xfe260000 0 0x10000>;
198 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
199 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
200 pcie@0 {
201 ranges = <0x02000000 0 0xe0000000
202 0x02000000 0 0xe0000000
203 0 0x10000000
205 0x01000000 0 0x00000000
206 0x01000000 0 0x00000000
207 0 0x00010000>;
212 reg = <0xf 0xfe270000 0 0x10000>;
213 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
214 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
215 pcie@0 {
216 ranges = <0x02000000 0 0xe0000000
217 0x02000000 0 0xe0000000
218 0 0x10000000
220 0x01000000 0 0x00000000
221 0x01000000 0 0x00000000
222 0 0x00010000>;
227 ranges = <0x0 0xf 0xfe140000 0x40000>;
228 reg = <0xf 0xfe140000 0 0x480>;
229 brg-frequency = <0>;
230 bus-frequency = <0>;
234 reg = <0x700 0x80>;
239 reg = <0x1000 0x800>;
248 fsl,tx-timeslot-mask = <0xfffffffe>;
249 fsl,rx-timeslot-mask = <0xfffffffe>;
251 fsl,tdm-id = <0>;
252 fsl,siram-entry-id = <0>;
258 port-number = <0>;