Lines Matching +full:bman +full:- +full:fqd
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
11 /include/ "t104xsi-pre.dtsi"
21 reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
26 bman_fbpr: bman-fbpr {
30 qman_fqd: qman-fqd {
34 qman_pfdr: qman-pfdr {
50 #address-cells = <1>;
51 #size-cells = <1>;
52 compatible = "cfi-flash";
54 bank-width = <2>;
55 device-width = <2>;
59 #address-cells = <1>;
60 #size-cells = <1>;
61 compatible = "fsl,ifc-nand";
65 board-control@2,0 {
70 chassis-mgmt@6,0 {
73 interrupt-controller;
74 interrupt-parent = <&mpic>;
76 #interrupt-cells = <1>;
89 bportals: bman-portals@ff4000000 {
93 qportals: qman-portals@ff6000000 {
102 network-clock@1 {
105 spi-max-frequency = <1000000>;
114 clock-frequency = <100000>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 i2c-mux-idle-disconnect;
125 #address-cells = <1>;
126 #size-cells = <0>;
132 read-only;
133 label = "ddr3-spd";
139 #address-cells = <1>;
140 #size-cells = <0>;
142 temp-sensor@48 {
147 temp-sensor@4a {
152 temp-sensor@4b {
162 clock-frequency = <100000>;
213 phy-mode = "sgmii";
214 fixed-link {
216 full-duplex;
221 phy-mode = "sgmii";
222 fixed-link {
224 full-duplex;
237 phy-handle = <&front_phy>;
238 phy-mode = "rgmii-id";
242 front_phy: ethernet-phy@11 {
316 brg-frequency = <0>;
317 bus-frequency = <0>;
320 compatible = "fsl,t1040-qe-si";
325 compatible = "fsl,t1040-qe-siram";
331 compatible = "fsl,ucc-hdlc";
332 rx-clock-name = "clk9";
333 tx-clock-name = "clk9";
334 fsl,hdlc-bus;
339 #include "t1040si-post.dtsi"