Lines Matching +full:fpga +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Based on: SBS CM6 Device Tree Source
14 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
17 /include/ "mpc8641si-pre.dtsi"
35 4 0 0xfc000000 0x00008000 // FPGA
36 5 0 0xfc008000 0x00008000 // AFIX FPGA
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
42 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
44 bank-width = <4>;
45 device-width = <2>;
46 #address-cells = <1>;
47 #size-cells = <1>;
51 read-only;
57 compatible = "gef,sbc610-paged-flash", "cfi-flash";
59 bank-width = <4>;
60 device-width = <2>;
61 #address-cells = <1>;
62 #size-cells = <1>;
70 read-only;
80 fpga@4,0 {
81 compatible = "gef,fpga-regs";
86 compatible = "gef,fpga-wdt";
89 interrupt-parent = <&gef_pic>;
93 compatible = "gef,fpga-wdt";
96 interrupt-parent = <&gef_pic>;
100 #interrupt-cells = <1>;
101 interrupt-controller;
102 compatible = "gef,fpga-pic";
108 #gpio-cells = <2>;
109 compatible = "gef,sbc610-gpio";
111 gpio-controller;
141 tbi-handle = <&tbi0>;
142 phy-handle = <&phy0>;
143 phy-connection-type = "gmii";
147 phy0: ethernet-phy@0 {
148 interrupt-parent = <&gef_pic>;
152 phy2: ethernet-phy@2 {
153 interrupt-parent = <&gef_pic>;
157 tbi0: tbi-phy@11 {
159 device_type = "tbi-phy";
164 tbi-handle = <&tbi2>;
165 phy-handle = <&phy2>;
166 phy-connection-type = "gmii";
170 tbi2: tbi-phy@11 {
172 device_type = "tbi-phy";
214 /include/ "mpc8641si-post.dtsi"