Lines Matching +full:0 +full:xfd000000

25 		reg = <0x0 0x40000000>;	// set by uboot
29 		reg = <0xfef05000 0x1000>;
31 		ranges = <0 0 0xff000000 0x01000000	// 16MB Boot flash
32 			  1 0 0xe8000000 0x08000000	// Paged Flash 0
33 			  2 0 0xe0000000 0x08000000	// Paged Flash 1
34 			  3 0 0xfc100000 0x00020000	// NVRAM
35 			  4 0 0xfc000000 0x00008000	// FPGA
36 			  5 0 0xfc008000 0x00008000	// AFIX FPGA
37 			  6 0 0xfd000000 0x00800000	// IO FPGA (8-bit)
38 			  7 0 0xfd800000 0x00800000>;	// IO FPGA (32-bit)
40 		/* flash@0,0 is a mirror of part of the memory in flash@1,0
41 		flash@0,0 {
43 			reg = <0x0 0x0 0x1000000>;
48 			partition@0 {
50 				reg = <0x0 0x1000000>;
56 		flash@1,0 {
58 			reg = <0x1 0x0 0x8000000>;
63 			partition@0 {
65 				reg = <0x0 0x7800000>;
69 				reg = <0x7800000 0x800000>;
74 		nvram@3,0 {
77 			reg = <0x3 0x0 0x20000>;
80 		fpga@4,0 {
82 			reg = <0x4 0x0 0x40>;
88 			reg = <0x4 0x2000 0x8>;
89 			interrupts = <0x1a 0x4>;
96 			reg = <0x4 0x2010 0x8>;
97 			interrupts = <0x1b 0x4>;
105 			reg = <0x4 0x4000 0x20>;
106 			interrupts = <0x8 0x9 0 0>;
112 			reg = <0x7 0x14000 0x24>;
118 		ranges = <0x0 0xfef00000 0x00100000>;
123 				reg = <0x48>;
128 				reg = <0x4c>;
133 				reg = <0x00000051>;
138 				reg = <0x6b>;
149 			phy0: ethernet-phy@0 {
151 				interrupts = <0x9 0x4>;
156 				interrupts = <0x8 0x4>;
160 				reg = <0x11>;
173 				reg = <0x11>;
196 		reg = <0xfef08000 0x1000>;
197 		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
198 			  0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
200 		pcie@0 {
201 			ranges = <0x02000000 0x0 0x80000000
202 				  0x02000000 0x0 0x80000000
203 				  0x0 0x40000000
205 				  0x01000000 0x0 0x00000000
206 				  0x01000000 0x0 0x00000000
207 				  0x0 0x00400000>;