39  * parisc_acctyp(unsigned int inst) --
40  *    Given a PA-RISC memory access instruction, determine if the
45  *    instruction (i.e. you should really only call it if you know that
81 			 * older PA-RISC platforms.  The case where a block  in parisc_acctyp()
89 			 *   01  Graphics flush write  (IO space -> VM)  in parisc_acctyp()
90 			 *   10  Graphics flush read   (VM -> IO space)  in parisc_acctyp()
91 			 *   11  Graphics flush read/write (VM <-> IO space)  in parisc_acctyp()
106 			 *   Data TLB miss fault/data page fault  in parisc_acctyp()
127  * not, but I want it committed to CVS so I don't lose it :-)
130 				if (tree->vm_start > addr) {
131 					tree = tree->vm_avl_left;
134 					if (prev->vm_next == NULL)
136 					if (prev->vm_next->vm_start > addr)
138 					tree = tree->vm_avl_right;
147 	fix = search_exception_tables(regs->iaoq[0]);  in fixup_exception()
151 		 * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() sets the least-significant  in fixup_exception()
154 		 * opcode should be loaded with -EFAULT to report a userspace  in fixup_exception()
157 		if (fix->fixup & 1) {  in fixup_exception()
158 			int fault_error_reg = fix->err_opcode & 0x1f;  in fixup_exception()
160 				regs->gr[fault_error_reg] = -EFAULT;  in fixup_exception()
162 				fault_error_reg, (void*)regs->iaoq[0]);  in fixup_exception()
165 			if (parisc_acctyp(0, regs->iir) == VM_READ) {  in fixup_exception()
166 				int treg = regs->iir & 0x1f;  in fixup_exception()
168 				regs->gr[treg] = 0;  in fixup_exception()
172 		regs->iaoq[0] = (unsigned long)&fix->fixup + fix->fixup;  in fixup_exception()
173 		regs->iaoq[0] &= ~3;  in fixup_exception()
181 		regs->iaoq[1] = regs->iaoq[0] + 4;  in fixup_exception()
182 		regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */  in fixup_exception()
194  * "PA-RISC 1.1 Architecture and Instruction Set Reference Manual"
200 	[1] =	"High-priority machine check (HPMC)",
203 	[5] =	"Low-priority machine check",
204 	[6] =	"Instruction TLB miss fault",
213 	[15] =	"Data TLB miss fault",
214 	[16] =	"Non-access ITLB miss fault",
215 	[17] =	"Non-access DTLB miss fault",
218 	[20] =	"TLB dirty bit trap",
254 	    tsk->comm, code, address);  in show_signal_msg()
255 	print_vma_addr(KERN_CONT " in ", regs->iaoq[0]);  in show_signal_msg()
262 			vma->vm_start, vma->vm_end);  in show_signal_msg()
279 	mm = tsk->mm;  in do_page_fault()
289 	acc_type = parisc_acctyp(code, regs->iir);  in do_page_fault()
296 	if (!vma || address < vma->vm_start) {  in do_page_fault()
297 		if (!prev_vma || !(prev_vma->vm_flags & VM_GROWSUP))  in do_page_fault()
309 	if ((vma->vm_flags & acc_type) != acc_type)  in do_page_fault()
370 		case 15:	/* Data TLB miss fault/Data page fault */  in do_page_fault()
373 			    address < vma->vm_start || address >= vma->vm_end) {  in do_page_fault()
380 			if ((vma->vm_flags & acc_type) != acc_type) {  in do_page_fault()
388 		case 17:	/* NA data TLB miss / page fault */  in do_page_fault()
389 		case 18:	/* Unaligned access - PCXS only */  in do_page_fault()
393 		case 16:	/* Non-access instruction TLB miss fault */  in do_page_fault()
405 			tsk->comm, tsk->pid, address);  in do_page_fault()
445 /* Handle non-access data TLB miss faults.
455 	unsigned long insn = regs->iir;  in handle_nadtlb_fault()
478 				regs->gr[breg] += regs->gr[xreg];  in handle_nadtlb_fault()
480 		regs->gr[0] |= PSW_N;  in handle_nadtlb_fault()
486 		if (regs->isr) {  in handle_nadtlb_fault()
488 			mm = tsk->mm;  in handle_nadtlb_fault()
491 				address = regs->ior;  in handle_nadtlb_fault()
502 				    && (vma->vm_flags & acc_type) == acc_type)  in handle_nadtlb_fault()
507 			regs->gr[treg] = val;  in handle_nadtlb_fault()
508 		regs->gr[0] |= PSW_N;  in handle_nadtlb_fault()
518 				regs->gr[breg] += regs->gr[xreg];  in handle_nadtlb_fault()
522 			regs->gr[treg] = 0;  in handle_nadtlb_fault()
523 		regs->gr[0] |= PSW_N;  in handle_nadtlb_fault()