Lines Matching +full:5 +full:va
176 va = r8 /* virtual address for which the trap occurred */ define
189 mfctl %pcoq, va
206 mfctl %pcoq, va
220 mfctl %ior,va
238 mfctl %ior,va
252 mfctl %ior, va
270 mfctl %ior, va
282 mfctl %ior,va
298 mfctl %ior,va
312 mfctl %ior,va
330 mfctl %ior,va
336 * fault. We have to extract this and place it in the va,
338 .macro space_adjust spc,va,tmp
342 depd \tmp,31,SPACEID_SHIFT,\va
386 .macro L2_ptep pmd,pte,index,va,fault
388 extru_safe \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
390 extru_safe \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
400 extru_safe \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
406 .macro L3_ptep pgd,pte,index,va,fault
409 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
414 L2_ptep \pgd,\pte,\index,\va,\fault
593 .macro do_alias spc,tmp,tmp1,va,pte,prot,fault,patype
596 copy \va,\tmp1
601 extrw,u \tmp,5,6,\tmp
630 extrw,u,= \va,31-TMPALIAS_SIZE_BITS,1,%r0
635 SHRREG \pte,PAGE_SHIFT+PAGE_ADD_SHIFT-5, \pte
636 depi_safe _PAGE_SIZE_ENCODING_DEFAULT, 31,5, \pte
658 def 5
701 def 5
1127 va = r8 /* virtual address for which the trap occurred */ define
1137 space_adjust spc,va,t0
1141 L3_ptep ptp,pte,t0,va,dtlb_check_alias_20w
1155 do_alias spc,t0,t1,va,pte,prot,dtlb_fault,20
1164 space_adjust spc,va,t0
1168 L3_ptep ptp,pte,t0,va,nadtlb_check_alias_20w
1182 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate,20
1197 L2_ptep ptp,pte,t0,va,dtlb_check_alias_11
1207 idtlba pte,(%sr1,va)
1208 idtlbp prot,(%sr1,va)
1217 do_alias spc,t0,t1,va,pte,prot,dtlb_fault,11
1219 idtlba pte,(va)
1220 idtlbp prot,(va)
1231 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_11
1241 idtlba pte,(%sr1,va)
1242 idtlbp prot,(%sr1,va)
1251 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate,11
1253 idtlba pte,(va)
1254 idtlbp prot,(va)
1261 space_adjust spc,va,t0
1265 L2_ptep ptp,pte,t0,va,dtlb_check_alias_20
1281 do_alias spc,t0,t1,va,pte,prot,dtlb_fault,20
1294 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_20
1310 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate,20
1338 space_adjust spc,va,t0
1342 L3_ptep ptp,pte,t0,va,itlb_fault
1362 space_adjust spc,va,t0
1366 L3_ptep ptp,pte,t0,va,naitlb_check_alias_20w
1380 do_alias spc,t0,t1,va,pte,prot,naitlb_fault,20
1395 L2_ptep ptp,pte,t0,va,itlb_fault
1405 iitlba pte,(%sr1,va)
1406 iitlbp prot,(%sr1,va)
1419 L2_ptep ptp,pte,t0,va,naitlb_check_alias_11
1429 iitlba pte,(%sr1,va)
1430 iitlbp prot,(%sr1,va)
1439 do_alias spc,t0,t1,va,pte,prot,itlb_fault,11
1441 iitlba pte,(%sr0, va)
1442 iitlbp prot,(%sr0, va)
1454 L2_ptep ptp,pte,t0,va,itlb_fault
1474 L2_ptep ptp,pte,t0,va,naitlb_check_alias_20
1490 do_alias spc,t0,t1,va,pte,prot,naitlb_fault,20
1503 space_adjust spc,va,t0
1507 L3_ptep ptp,pte,t0,va,dbit_fault
1527 L2_ptep ptp,pte,t0,va,dbit_fault
1537 idtlba pte,(%sr1,va)
1538 idtlbp prot,(%sr1,va)
1551 L2_ptep ptp,pte,t0,va,dbit_fault
1969 STREG %r26, 5*REG_SZ(%r3)
1993 LDREG 5*REG_SZ(%r3), %r26