Lines Matching +full:altera +full:- +full:www
4 * Copyright (C) 2013-2014 Altera Corporation
9 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
12 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
29 #include <asm/asm-offsets.h>
30 #include <asm/asm-macros.h>
40 andhi \reg, sp, %hi(~(THREAD_SIZE-1))
42 addi \reg, r0, %lo(~(THREAD_SIZE-1))
51 * ea-4 = address of interrupted insn (ea must be preserved).
58 movui et, (KUSER_BASE + 4 + (cmpxchg_stw - __kuser_helper_start))
61 subi et, et, (cmpxchg_stw - cmpxchg_ldw) /* et = cmpxchg_ldw + 4 */
71 .word unhandled_exception /* 0 - Reset */
72 .word unhandled_exception /* 1 - Processor-only Reset */
73 .word external_interrupt /* 2 - Interrupt */
74 .word handle_trap /* 3 - Trap Instruction */
76 .word instruction_trap /* 4 - Unimplemented instruction */
77 .word handle_illegal /* 5 - Illegal instruction */
78 .word handle_unaligned /* 6 - Misaligned data access */
79 .word handle_unaligned /* 7 - Misaligned destination address */
81 .word handle_diverror /* 8 - Division error */
82 .word protection_exception_ba /* 9 - Supervisor-only instr. address */
83 .word protection_exception_instr /* 10 - Supervisor only instruction */
84 .word protection_exception_ba /* 11 - Supervisor only data address */
86 .word unhandled_exception /* 12 - Double TLB miss (data) */
87 .word protection_exception_pte /* 13 - TLB permission violation (x) */
88 .word protection_exception_pte /* 14 - TLB permission violation (r) */
89 .word protection_exception_pte /* 15 - TLB permission violation (w) */
91 .word unhandled_exception /* 16 - MPU region violation */
142 * whether it's trap, tlb-miss or interrupt. If we don't do this
164 ldwio r24, -4(ea) /* instruction that caused the exception */
240 movi r2, -ENOSYS
298 movi r2, -ENOSYS
303 ldw r10, TI_FLAGS(r11) /* get thread_info->flags */
322 ldw r4, PT_R4(sp) /* reload syscall arguments r4-r9 */
354 addi ea, ea, -4 /* re-issue the interrupted instruction */
356 2: movi r4, %lo(-1) /* Start from bit position 0,
412 addi ra, ra, (end_translate_rc_and_ret - translate_rc_and_ret)
478 * Beware - when entering resume, prev (the current task) is
515 * Each segment is 64-byte aligned and will be mapped to the <User space>.
524 .if ((. - \sym) & 3)
525 .rept (4 - (. - \sym) & 3)
529 .rept ((\size - (. - \sym)) / 4)
539 .word ((__kuser_helper_end - __kuser_helper_start) >> 6)