1 // SPDX-License-Identifier: GPL-2.0
3  * ip28-berr.c: Bus error handling.
5  * Copyright (C) 2002, 2003 Ladislav Michl (ladis@linux-mips.org)
6  * Copyright (C) 2005 Peter Fuerst (pf@net.alphadv.de) - IP28
21 #include <asm/sgi/mc.h>
39 static unsigned int hpc3_berr_stat;	/* Bus error interrupt status */
69 	 * Starting with a bus-address, save secondary cache (indexed by  in save_cache_tags()
84 	 * might fit to this bus-address, knowing that VA[11:0] == PA[11:0].  in save_cache_tags()
89 	addr &= (0xffL << 56) | ((1 << 12) - 1);  in save_cache_tags()
105 	addr &= (0xffL << 56) | ((1 << 12) - 1);  in save_cache_tags()
126 	cpu_err_addr = sgimc->cerr;  in save_and_clear_buserr()
127 	cpu_err_stat = sgimc->cstat;  in save_and_clear_buserr()
128 	gio_err_addr = sgimc->gerr;  in save_and_clear_buserr()
129 	gio_err_stat = sgimc->gstat;  in save_and_clear_buserr()
130 	extio_stat = sgioc->extio;  in save_and_clear_buserr()
131 	hpc3_berr_stat = hpc3c0->bestat;  in save_and_clear_buserr()
133 	hpc3.scsi[0].addr  = (unsigned long)&hpc3c0->scsi_chan0;  in save_and_clear_buserr()
134 	hpc3.scsi[0].ctrl  = hpc3c0->scsi_chan0.ctrl; /* HPC3_SCTRL_ACTIVE ? */  in save_and_clear_buserr()
135 	hpc3.scsi[0].cbp   = hpc3c0->scsi_chan0.cbptr;  in save_and_clear_buserr()
136 	hpc3.scsi[0].ndptr = hpc3c0->scsi_chan0.ndptr;  in save_and_clear_buserr()
138 	hpc3.scsi[1].addr  = (unsigned long)&hpc3c0->scsi_chan1;  in save_and_clear_buserr()
139 	hpc3.scsi[1].ctrl  = hpc3c0->scsi_chan1.ctrl; /* HPC3_SCTRL_ACTIVE ? */  in save_and_clear_buserr()
140 	hpc3.scsi[1].cbp   = hpc3c0->scsi_chan1.cbptr;  in save_and_clear_buserr()
141 	hpc3.scsi[1].ndptr = hpc3c0->scsi_chan1.ndptr;  in save_and_clear_buserr()
143 	hpc3.ethrx.addr	 = (unsigned long)&hpc3c0->ethregs.rx_cbptr;  in save_and_clear_buserr()
144 	hpc3.ethrx.ctrl	 = hpc3c0->ethregs.rx_ctrl; /* HPC3_ERXCTRL_ACTIVE ? */  in save_and_clear_buserr()
145 	hpc3.ethrx.cbp	 = hpc3c0->ethregs.rx_cbptr;  in save_and_clear_buserr()
146 	hpc3.ethrx.ndptr = hpc3c0->ethregs.rx_ndptr;  in save_and_clear_buserr()
148 	hpc3.ethtx.addr	 = (unsigned long)&hpc3c0->ethregs.tx_cbptr;  in save_and_clear_buserr()
149 	hpc3.ethtx.ctrl	 = hpc3c0->ethregs.tx_ctrl; /* HPC3_ETXCTRL_ACTIVE ? */  in save_and_clear_buserr()
150 	hpc3.ethtx.cbp	 = hpc3c0->ethregs.tx_cbptr;  in save_and_clear_buserr()
151 	hpc3.ethtx.ndptr = hpc3c0->ethregs.tx_ndptr;  in save_and_clear_buserr()
155 		hpc3.pbdma[i].addr  = (unsigned long)&hpc3c0->pbdma[i];  in save_and_clear_buserr()
156 		hpc3.pbdma[i].ctrl  = hpc3c0->pbdma[i].pbdma_ctrl;  in save_and_clear_buserr()
157 		hpc3.pbdma[i].cbp   = hpc3c0->pbdma[i].pbdma_bptr;  in save_and_clear_buserr()
158 		hpc3.pbdma[i].ndptr = hpc3c0->pbdma[i].pbdma_dptr;  in save_and_clear_buserr()
167 	sgimc->cstat = sgimc->gstat = 0;  in save_and_clear_buserr()
180 	scb = cache_tags.err_addr & ((1 << 12) - 1) & ~((1 << 5) - 1);  in print_cache_tags()
191 	scb = cache_tags.err_addr & ((1 << 12) - 1) & ~((1 << 6) - 1);  in print_cache_tags()
204 	scw = ((i >> 16) & 7) + 19 - 1; /* scwaysize = 2^[24..19] / 2 */  in print_cache_tags()
206 	i = ((1 << scw) - 1) & ~((1 << scb) - 1);  in print_cache_tags()
210 		scw-1, scb, i & (unsigned)cache_tags.err_addr);  in print_cache_tags()
222 		"Bus error (instruction fetch)",  in cause_excode_text()
223 		"Bus error (data: load or store)",  in cause_excode_text()
231 		"Floating-Point",  in cause_excode_text()
245 		printk(KERN_ERR "MC Bus Error\n");  in print_buserr()
249 		printk(KERN_ERR "HPC3 Bus Error 0x%x:<id=0x%x,%s,lane=0x%x>\n",  in print_buserr()
258 		printk(KERN_ERR "EISA Bus Error\n");  in print_buserr()
288 		printk(KERN_ERR "MC: Hmm, didn't find any error condition.\n");  in print_buserr()
291 			"MC: cpuctrl0/1: %08x/%05x, giopar: %04x\n"  in print_buserr()
292 			"MC: cpu/gio_memacc: %08x/%05x, memcfg0/1: %08x/%08x\n",  in print_buserr()
294 			sgimc->cpuctrl0, sgimc->cpuctrl0, sgimc->giopar,  in print_buserr()
295 			sgimc->cmacc, sgimc->gmacc,  in print_buserr()
296 			sgimc->mconfig0, sgimc->mconfig1);  in print_buserr()
300 	       cause_excode_text(regs->cp0_cause),  in print_buserr()
301 	       field, regs->cp0_epc, field, regs->regs[31]);  in print_buserr()
306 	/* This is likely rather similar to correct code ;-) */  in check_microtlb()
310 	/* If tlb-entry is valid and VPN-high (bits [30:21] ?) matches... */  in check_microtlb()
312 		u32 ctl = sgimc->dma_ctrl;  in check_microtlb()
315 			/* PTEIndex is VPN-low (bits [22:14]/[20:12] ?) */  in check_microtlb()
322 				 * match the TLB/EntryLo-register format !  in check_microtlb()
327 				a += vaddr & ((1 << pgsz) - 1);  in check_microtlb()
338 		u32 a = sgimc->maddronly;  in check_vdma_memaddr()
340 		if (!(sgimc->dma_ctrl & 0x100)) /* Xlate-bit clear ? */  in check_vdma_memaddr()
343 		if (check_microtlb(sgimc->dtlb_hi0, sgimc->dtlb_lo0, a) ||  in check_vdma_memaddr()
344 		    check_microtlb(sgimc->dtlb_hi1, sgimc->dtlb_lo1, a) ||  in check_vdma_memaddr()
345 		    check_microtlb(sgimc->dtlb_hi2, sgimc->dtlb_lo2, a) ||  in check_vdma_memaddr()
346 		    check_microtlb(sgimc->dtlb_hi3, sgimc->dtlb_lo3, a))  in check_vdma_memaddr()
355 		u32 a = sgimc->gio_dma_trans;  in check_vdma_gioaddr()
356 		a = (sgimc->gmaddronly & ~a) | (sgimc->gio_dma_sbits & a);  in check_vdma_gioaddr()
363  * MC sends an interrupt whenever bus or parity errors occur. In addition,
364  * if the error happened during a CPU read, it also asserts the bus error
365  * pin on the R4K. Code in bus error handler save the MC bus error registers
379 	if (regs->cp0_cause & CAUSEF_EXCCODE)  in ip28_be_interrupt()
382 	/* Any cause other than "Bus error interrupt" (IP6) is weird. */  in ip28_be_interrupt()
383 	if ((regs->cp0_cause & CAUSEF_IP6) != CAUSEF_IP6)  in ip28_be_interrupt()
389 	/* Any state other than "Memory bus error" is fatal. */  in ip28_be_interrupt()
398 	 * Now we have an asynchronous bus error, speculatively or DMA caused.  in ip28_be_interrupt()
404 		    (cpu_err_addr == hp->ndptr || cpu_err_addr == hp->cbp))  in ip28_be_interrupt()
407 		    (gio_err_addr == hp->ndptr || gio_err_addr == hp->cbp))  in ip28_be_interrupt()
414 		       CPHYSADDR(hp->addr), hp->ctrl, hp->ndptr, hp->cbp);  in ip28_be_interrupt()
417 	/* Check MC's virtual DMA stuff. */  in ip28_be_interrupt()
420 			sgimc->maddronly);  in ip28_be_interrupt()
425 			sgimc->gmaddronly);  in ip28_be_interrupt()
428 	/* A speculative bus error... */  in ip28_be_interrupt()
458 	 * i.e. by a bus error exception without a bus error interrupt.  in ip28_be_handler()